On 03/06/2015 11:56 PM, Takashi Iwai wrote:
At Fri, 06 Mar 2015 15:31:32 -0800, Alnie wrote:
On 03/04/2015 01:35 AM, Takashi Iwai wrote:
At Wed, 04 Mar 2015 01:01:32 -0800, Alnie wrote:
On 03/04/2015 12:00 AM, Takashi Iwai wrote:
At Tue, 03 Mar 2015 18:12:31 -0800, Alnie wrote:
> My suggestion isn't about a compile option but that you add some debug > printk() calls manually around some codes. We need to know the value > written and read by azx_write*() and azx_read*() calls. Especially > the value read in pci_azx_read*() is more interesting. You can try to > modify sound/pci/hda/hda_intel.c and add a printk() to each > pci_azx_read*() function for printing the value to be returned. > Beware that this will likely flood many messages, so just try once. > > > Takashi >
I can not find any reference to pci_azx_read in hda_intel.c
You must be using a too old kernel, then. Please use the latest kernel for debugging.
Takashi
Ok. I now have latest kernel.
Here is a small portion...
/* PCI register access. */ static void pci_azx_writel(u32 value, u32 __iomem *addr) { writel(value, addr); }
static u32 pci_azx_readl(u32 __iomem *addr) { return readl(addr); }
Can you show me how I can properly place printk without breaking things and produce relevant messages?
Something like:
static u32 pci_azx_readl(u32 __iomem *addr) { u32 val = readl(addr); pr_info("XXX readl %p %x\n", addr, val); return val; }
But since there are quite lots of accesses, it might be safer to use the ratelimited version. Use like the following: pr_info_ratelimited("XXX readl %p %x\n", addr, val);
Also there are variants pci_azx_readw() and _readb().
Takashi
Ok, I was only able to guess through the code for the read values. If you need write information too please show me how. here are the mods I made...
/* PCI register access. */ static void pci_azx_writel(u32 value, u32 __iomem *addr) { writel(value, addr); }
static u32 pci_azx_readl(u32 __iomem *addr) { u32 val = readl(addr); pr_info_ratelimited("XXX readl %p %x\n", addr, val); return val; }
static void pci_azx_writew(u16 value, u16 __iomem *addr) { writew(value, addr); }
static u16 pci_azx_readw(u16 __iomem *addr) { u16 val = readw(addr); pr_info_ratelimited("XXX readw %p %x\n", addr, val); return val; }
static void pci_azx_writeb(u8 value, u8 __iomem *addr) { writeb(value, addr); }
static u8 pci_azx_readb(u8 __iomem *addr) { u8 val = readb(addr); pr_info_ratelimited("XXX readb %p %x\n", addr, val); return val; }
and i was able to produce this...
dmesg | grep -i read [ 0.764102] tpm_tis 00:05: A TPM error (7) occurred attempting to read a pcr value [ 0.769674] Write protecting the kernel read-only data: 12288k [ 1.729952] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA [ 2.071100] sd 1:0:0:0: [sdb] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA [ 2.778875] EXT4-fs (sda5): INFO: recovery required on readonly filesystem [ 2.817982] EXT4-fs (sda5): orphan cleanup on readonly fs [ 4.662442] XXX readw ffffc90004f30000 4401
This reads good, but I thought you have two sound devices (onboard and Creative)? If so, disable the onboard one via enable=0 option (if the onboard one is assigned first). Otherwise the all good and bad results are mixed up.
Takashi
I included options snd-hda-intel enable=0 index=0
This is dmesg output (1b is onboard)... dmesg | grep -i hda [ 3.700213] snd_hda_intel: probe of 0000:00:1b.0 failed with error -2 [ 37.729507] snd_hda_intel 0000:06:00.0: enabling device (0000 -> 0002) [ 37.729703] snd_hda_intel 0000:06:00.0: enabling bus mastering [ 37.736026] snd_hda_intel 0000:06:00.0: CORB reset timeout#1, CORBRP = 0 [ 38.740090] snd_hda_intel 0000:06:00.0: Codec #1 probe error; disabling it... [ 38.747292] snd_hda_intel 0000:06:00.0: CORB reset timeout#1, CORBRP = 0 [ 43.776089] snd_hda_intel 0000:06:00.0: no AFG or MFG node found [ 43.776111] snd_hda_intel 0000:06:00.0: no codecs initialized
dmesg | grep -i XXX [ 37.729723] XXX readw ffffc90005188000 3300 [ 37.729768] XXX readl ffffc90005188008 0 [ 37.729774] XXX readb ffffc90005188008 0 [ 37.730803] XXX readb ffffc90005188008 0 [ 37.730812] XXX readb ffffc90005188008 0 [ 37.731839] XXX readb ffffc90005188008 1 [ 37.733060] XXX readb ffffc90005188008 1 [ 37.733065] XXX readl ffffc90005188008 1 [ 37.733069] XXX readw ffffc9000518800e 2 [ 37.733075] XXX readl ffffc90005188020 0 [ 37.733081] XXX readw ffffc9000518804a 0 [ 37.733086] XXX readw ffffc9000518804a 0 [ 37.733090] XXX readw ffffc9000518804a 0 [ 37.733095] XXX readw ffffc9000518804a 0 [ 37.733099] XXX readw ffffc9000518804a 0 [ 37.733104] XXX readw ffffc9000518804a 0 [ 37.733108] XXX readw ffffc9000518804a 0 [ 37.733113] XXX readw ffffc9000518804a 0 [ 37.736839] XXX readl ffffc90005188024 c0000000 [ 37.736844] XXX readb ffffc9000518805d 1 [ 38.740103] XXX readb ffffc90005188080 0 [ 38.740110] XXX readb ffffc900051880a0 0 [ 38.740116] XXX readb ffffc900051880c0 0 [ 38.740122] XXX readb ffffc900051880e0 0 [ 38.740134] XXX readl ffffc90005188020 c0000000 [ 38.740144] XXX readl ffffc90005188008 101 [ 38.743555] XXX readl ffffc90005188008 1 [ 38.743567] XXX readl ffffc90005188020 0 [ 38.747380] XXX readl ffffc90005188024 c0000000 [ 39.752132] XXX readl ffffc90005188024 c0000000 [ 42.768069] XXX readw ffffc90005188048 4 [ 42.768073] XXX readw ffffc9000518804a 4 [ 42.768113] XXX readl ffffc90005188024 c0000000 [ 42.768119] XXX readb ffffc9000518805d 1 [ 42.768201] XXX readw ffffc90005188058 0
-Alnie