Hi,
There is a bug in the code for the tlv320adc3101 driver when setting up the D value for PLL.
The D value is set via I2C using page 0 registers 7 (MSB) and 8 (LSB). The data sheet has the following information for the registers:
"Page 0 / Register 7 will be updated when Page 0 / Register 8 is written immediately after Page 0 / Register 7 is written"
and:
"Page 0 / Register 8 must be written immediately after writing to Page 0 / Register 7"
The function that implements this is adc3xxx_setup_pll() in file soc/codecs/tlv320adc3xxx.c line 1172 - 1189. The function is shown below:
static void adc3xxx_setup_pll(struct snd_soc_component *component, int div_entry) { int i = div_entry;
/* P & R values */ snd_soc_component_write(component, ADC3XXX_PLL_PROG_PR, (adc3xxx_divs[i].pll_p << ADC3XXX_PLLP_SHIFT) | (adc3xxx_divs[i].pll_r << ADC3XXX_PLLR_SHIFT)); /* J value */ snd_soc_component_write(component, ADC3XXX_PLL_PROG_J, adc3xxx_divs[i].pll_j & ADC3XXX_PLLJ_MASK); /* D value */ snd_soc_component_write(component, ADC3XXX_PLL_PROG_D_LSB, adc3xxx_divs[i].pll_d & ADC3XXX_PLLD_LSB_MASK); snd_soc_component_write(component, ADC3XXX_PLL_PROG_D_MSB, (adc3xxx_divs[i].pll_d >> 8) & ADC3XXX_PLLD_MSB_MASK); }
In the function the LSB (register 8) is written first followed by the MSB (register 7). This is the wrong way around and should be swapped so that the MSB is written first.
Regards
Terry Sanders