Camel
On 9/8/20 6:49 AM, Dan Murphy wrote:
Camel
On 9/8/20 3:35 AM, Camel Guo wrote:
From: Camel Guo camelg@axis.com
According to its datasheet, after reset this codec goes into sleep mode. In this mode, any register accessing should be avoided except for exiting sleep mode. Hence this commit moves SLEEP_CFG access before any register accessing.
This is interesting because our HW team suggested putting the device into sleep mode when doing register writes/reads because they were finding abnormalities in the register settings when the device is active.
I have a local patch that changes this as well that the HW team requested.
OK I have clarification on this now. Their original request was incorrect they indicate the BIAS, ADC and PLLs be powered down during writes and reads.
Mark
Let me run this by the HW team first before applying this patch.
Mark
Acked-by: Dan Murphy dmurphy@ti.com
Dan