6 Aug
2020
6 Aug
'20
2:37 p.m.
On Thu, Aug 06, 2020 at 03:39:45PM +0800, Shengjiu Wang wrote:
} else if (of_node_name_eq(cpu_np, "esai")) {
struct clk *esai_clk = clk_get(&cpu_pdev->dev, "extal");
if (!IS_ERR(esai_clk)) {
priv->cpu_priv.sysclk_freq[TX] = clk_get_rate(esai_clk);
priv->cpu_priv.sysclk_freq[RX] = clk_get_rate(esai_clk);
clk_put(esai_clk);
}
This should handle probe deferral. Also if this clock is in use shouldn't we be enabling it? It looks like it's intended to be a crystal so it's probably forced on all the time but sometimes there's power control for crystals, or perhaps someone might do something unusual with the hardware.