Add i.MX8ULP specific soc data, the max register is FSL_SAI_RTCAP the IP version is also 0x0301, So version can't be used for the condition of register FSL_SAI_MCTL setting.
Signed-off-by: Shengjiu Wang shengjiu.wang@nxp.com --- sound/soc/fsl/fsl_sai.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index b528722acd65..fa950dde5310 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -1147,7 +1147,7 @@ static int fsl_sai_probe(struct platform_device *pdev)
/* Select MCLK direction */ if (of_find_property(np, "fsl,sai-mclk-direction-output", NULL) && - sai->verid.version >= 0x0301) { + sai->soc_data->max_register >= FSL_SAI_MCTL) { regmap_update_bits(sai->regmap, FSL_SAI_MCTL, FSL_SAI_MCTL_MCLK_EN, FSL_SAI_MCTL_MCLK_EN); } @@ -1272,6 +1272,17 @@ static const struct fsl_sai_soc_data fsl_sai_imx8mp_data = { .max_register = FSL_SAI_MDIV, };
+static const struct fsl_sai_soc_data fsl_sai_imx8ulp_data = { + .use_imx_pcm = true, + .use_edma = true, + .fifo_depth = 16, + .reg_offset = 8, + .mclk0_is_mclk1 = false, + .pins = 4, + .flags = PMQOS_CPU_LATENCY, + .max_register = FSL_SAI_RTCAP, +}; + static const struct of_device_id fsl_sai_ids[] = { { .compatible = "fsl,vf610-sai", .data = &fsl_sai_vf610_data }, { .compatible = "fsl,imx6sx-sai", .data = &fsl_sai_imx6sx_data }, @@ -1281,6 +1292,7 @@ static const struct of_device_id fsl_sai_ids[] = { { .compatible = "fsl,imx8qm-sai", .data = &fsl_sai_imx8qm_data }, { .compatible = "fsl,imx8mm-sai", .data = &fsl_sai_imx8mm_data }, { .compatible = "fsl,imx8mp-sai", .data = &fsl_sai_imx8mp_data }, + { .compatible = "fsl,imx8ulp-sai", .data = &fsl_sai_imx8ulp_data }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, fsl_sai_ids);