On Fri, Dec 15, 2017 at 11:36:54AM +0000, Charles Keepax wrote:
Hmm... might need to think about the case of whether to share a clock depends a little on what the hardware actually looks like.
But basically my point is that writing random CODEC registers from the machine driver is not very nice. You want to be making use of ASoC calls etc. to have the CODEC driver apply the setting you want.
For example you might call snd_soc_dai_set_fmt to configure who is master/slave, but you wouldn't want to write the bit that selects master mode on the CODEC directly from the machine driver.
I completely agree. ASoC calls would be better or maybe something in the DT. The register setting needs to reflect what the physical connections are. There is no ASRC on the chip so to have the ADC run at a different rate you would need to use an extra bclk and lrclk and configure it for that. The current version configures the chip so that the DAC and ADCs run synchronously which only needs the bclk, lrclk, din, and dout to function. Doing this in the machine driver is indeed broken as it is making assumptions.
The next version will either set a sane default using your suggestion or it will implement something through the device tree. I will think on it a bit more.