Allwinner suniv F1C100s has a reset bit for DMA in CCU. Sun4i do not has this bit but in order to support suniv we need to add it. So add support for reset bit.
Signed-off-by: Mesih Kilinc mesihkilinc@gmail.com --- drivers/dma/sun4i-dma.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
diff --git a/drivers/dma/sun4i-dma.c b/drivers/dma/sun4i-dma.c index e86b424..d267ff9 100644 --- a/drivers/dma/sun4i-dma.c +++ b/drivers/dma/sun4i-dma.c @@ -18,6 +18,7 @@ #include <linux/of_dma.h> #include <linux/of_device.h> #include <linux/platform_device.h> +#include <linux/reset.h> #include <linux/slab.h> #include <linux/spinlock.h>
@@ -153,6 +154,7 @@ struct sun4i_dma_config { u8 ddma_drq_sdram;
u8 max_burst; + bool has_reset; };
struct sun4i_dma_pchan { @@ -201,6 +203,7 @@ struct sun4i_dma_dev { int irq; spinlock_t lock; const struct sun4i_dma_config *cfg; + struct reset_control *rst; };
static struct sun4i_dma_dev *to_sun4i_dma_dev(struct dma_device *dev) @@ -1198,6 +1201,15 @@ static int sun4i_dma_probe(struct platform_device *pdev) return PTR_ERR(priv->clk); }
+ if(priv->cfg->has_reset) { + priv->rst = devm_reset_control_get_exclusive(&pdev->dev, + NULL); + if (IS_ERR(priv->rst)) { + dev_err(&pdev->dev, "Failed to get reset control\n"); + return PTR_ERR(priv->rst); + } + } + platform_set_drvdata(pdev, priv); spin_lock_init(&priv->lock);
@@ -1268,6 +1280,16 @@ static int sun4i_dma_probe(struct platform_device *pdev) return ret; }
+ /* Deassert the reset control */ + if (priv->rst) { + ret = reset_control_deassert(priv->rst); + if (ret) { + dev_err(&pdev->dev, + "Failed to deassert the reset control\n"); + goto err_clk_disable; + } + } + /* * Make sure the IRQs are all disabled and accounted for. The bootloader * likes to leave these dirty @@ -1339,6 +1361,7 @@ static struct sun4i_dma_config sun4i_a10_dma_cfg = { .ddma_drq_sdram = SUN4I_DDMA_DRQ_TYPE_SDRAM,
.max_burst = SUN4I_MAX_BURST, + .has_reset = false, };
static const struct of_device_id sun4i_dma_match[] = {