static int cs35l41_init(struct snd_soc_pcm_runtime *rtd) { @@ -117,10 +82,10 @@ static int cs35l41_init(struct snd_soc_pcm_runtime *rtd) static const struct { unsigned int rx[2]; } cs35l41_channel_map[] = {
- {.rx = {0, 1}}, /* TL */ {.rx = {0, 1}}, /* WL */
- {.rx = {1, 0}}, /* TR */ {.rx = {1, 0}}, /* WR */
- {.rx = {0, 1}}, /* TL */
- {.rx = {1, 0}}, /* TR */
};
static int cs35l41_hw_params(struct snd_pcm_substream *substream,
@@
-175,8 +140,32 @@ static const struct snd_soc_ops cs35l41_ops = { .hw_params = cs35l41_hw_params, };
+static const char * const cs35l41_name_prefixes[] = { "WL", "WR", +"TL", "TR" };
+static const char * const cs35l41_uid_strings[] = { "0", "1", "2", +"3" };
I must admit not understanding why you changed the order.
I vaguely recall Brent Lu added this on TL, WL, TR, WR order on purpose and that it matches the order in the SOF topology. Brent, can you please comment on this?
I don't really care about the order selected, just want to make sure we don't introduce a channel swap with what the firmware does.
The order here does not related to SOF topology or firmware. This is smart amp so the SSP port is using I2S format to send data.
The order TL/WL/TR/WR is to match the enumeration order in SSDT table. Since this patch is using UID to specify the amplifier, the order change should be fine.
Brent