On Fri, Nov 09, 2012 at 12:33:38PM -0500, Eric Millbrandt wrote:
When GPIO1 is used for other purposes than PLL output (GPIO, Amute, etc) the driver incorrectly reconfigures the pin to input when the PLL is recalculated. Only reconfigure the pin for input when reconfiguring the PLL and GPIO1 is used for PLL output.
I'm really having a hard time understanding what this change improves.
snd_soc_update_bits(codec, WM8978_GPIO_CONTROL, 0x30,
/** GPIO1 is used for OPCLK, reconfigure into default* mode as input - before configuring OPCLKDIV and PLL*/snd_soc_update_bits(codec, WM8978_GPIO_CONTROL, 0x37, (opclk_div - 1) << 4);
Previously we weren't changing the pin mode at all, we were only updating the bitfield that contains OPCLK. With your change we will also change the pin mode to input, but if the pin is doing any form of output (or anything other than input mode) I'd expect this to at least glitch things which seems actively harmful. Why is it being set up as an input? Though I have to say that all this handling of the pin in the existing driver looks at best odd.
Your changelog describes what you're doing but not what is being fixed...