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Hi Mark,
On 03/06/2015 01:12 PM, Mark Brown wrote:
On Thu, Feb 26, 2015 at 03:54:30PM -0700, Eric Nelson wrote:
Initialize CHIP_ANA_POWER to match power on defaults, which disables ADC, DAC, and charge pumps.
+++ b/sound/soc/codecs/sgtl5000.c @@ -47,12 +47,10 @@ static const struct reg_default sgtl5000_reg_defaults[] = { { SGTL5000_CHIP_ANA_ADC_CTRL, 0x0000 }, { SGTL5000_CHIP_ANA_HP_CTRL, 0x1818 }, { SGTL5000_CHIP_ANA_CTRL, 0x0111 }, - { SGTL5000_CHIP_LINREG_CTRL, 0x0000 }, { SGTL5000_CHIP_REF_CTRL, 0x0000 }, { SGTL5000_CHIP_MIC_CTRL, 0x0000 }, { SGTL5000_CHIP_LINE_OUT_CTRL, 0x0000 }, { SGTL5000_CHIP_LINE_OUT_VOL, 0x0404 }, - { SGTL5000_CHIP_ANA_POWER, 0x7060 },
Two big problems here. One is that this appears to also affect LINREG_CTRL which your changelog didn't mention.
It did mention the change:
> Initialize CHIP_ANA_POWER to match power on defaults, which > disables ADC, DAC, and charge pumps. > > In the process, remove references to the following > register/bitfields from the sgttl5000_set_power_regs routine: > CHIP_ANA_POWER/LINREG_SIMPLE_POWERUP and > CHIP_LINREG_CTRL/LINREG_VDD_MASK > > And remove CHIP_ANA_POWER and CHIP_LINREG_CTRL from the set > of default registers so they don't get clobbered by > sgtl5000_fill_defaults().
The CHIP_LINREG_CTRL value needs to be set based on the presence or absence of external VDDD, so writing a default (power-on) value doesn't help much, and this certainly shouldn't happen after the proper value is written.
The other is that contrary to what the changelog says this isn't fixing the default, it's removing it.
You're right about the commit message. It should be re-worded.
The whole point of the register defaults table is to contain the default power on register values, if it contains other things that is a bug and should be fixed by changing the values not removing them.
I understand that, but the crux of the problem is that these registers need to be set early, their order is critical, and some of them need to be written based on the internal/external VDDD decision.
In a soft reboot on a machine that doesn't actually control the power to the SGTL5000 (which is all supported boards at the moment), a write to the ANA_POWER register with stale values in either LINREG_CTRL or CLK_CTRL (from patch 5) will fail and cause the chip to lock up.
Discussion of this is the primary reason I sent this patch set as an RFC: to highlight the issues.
Given that confusion I'm really having a hard time understanding the rest of the commit.
Some of this (and some of your expressed concerns) could be alleviated by moving the call to sgtl5000_fill_defaults() before the newly-added code to initialize ANA_POWER based on whether an external VDDD is supplied or the internal LDO is used, but then the dependencies would be hidden in the order of registers in the table.
This is just more explicit.
I hope that clarifies things.
Regards,
Eric