On Thu, 2011-08-11 at 17:52 +0800, Scott Jiang wrote:
2011/8/11 Mark Brown broonie@opensource.wolfsonmicro.com:
On Thu, 2011-08-11 at 17:04 +0800, Scott Jiang wrote:
reg = (reg & (~AD193X_DAC_WORD_LEN_MASK)) | word_len;
reg = (reg & (~AD193X_DAC_WORD_LEN_MASK))| (word_len << AD193X_DAC_WORD_LEN_SHFT); snd_soc_write(codec, AD193X_DAC_CTRL2, reg); reg = snd_soc_read(codec, AD193X_ADC_CTRL1);
This needs some documentation as it's not clear what it's supposed to do.
the word_len value forgot to shift, I think it's clear.
This is an unrelated change and should be split out - the major reason it's confusing is that it's got nothing to do with the rest of the change.
+#if defined(CONFIG_SPI_MASTER)
/* asoc cache layer can't support this kind of spi registers now */codec->cache_bypass = 1;+#endif
That's not what cache_bypass is for. Just mark the registers as volatile, or remove the cache entirely.
volatile usually used on the read-only registers, so I think removing cache is better.
No, not at all. All volatile means is that a register can't be cached. For example, many interrupt status registers are write to clear so they're volatile because the device can change them but we still need to write to clear them.