Make sure wallclock counter and trigger timestamp are read very close to each other for better alignment.
Signed-off-by: Pierre-Louis Bossart pierre-louis.bossart@linux.intel.com --- sound/pci/hda/hda_controller.c | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/sound/pci/hda/hda_controller.c b/sound/pci/hda/hda_controller.c index 8337645..6a9f8c8 100644 --- a/sound/pci/hda/hda_controller.c +++ b/sound/pci/hda/hda_controller.c @@ -562,6 +562,8 @@ static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) azx_dev = get_azx_dev(substream); trace_azx_pcm_trigger(chip, azx_dev, cmd);
+ substream->runtime->trigger_tstamp_latched = 0; + if (dsp_is_locked(azx_dev) || !azx_dev->prepared) return -EPIPE;
@@ -657,6 +659,9 @@ static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) azx_writel(chip, SSYNC, azx_readl(chip, SSYNC) & ~sbits); if (start) { azx_timecounter_init(substream, 0, 0); + snd_pcm_gettime(substream->runtime, &substream->runtime->trigger_tstamp); + substream->runtime->trigger_tstamp_latched = 1; + if (nsync > 1) { cycle_t cycle_last;