17 Jun
2013
17 Jun
'13
9:03 p.m.
On Mon, Jun 17, 2013 at 03:53:14PM +0200, Linus Walleij wrote:
On Sun, Jun 16, 2013 at 10:54 PM, Tomasz Figa tomasz.figa@gmail.com wrote:
From: Alban Bedel alban.bedel@avionic-design.de
There are more fields than just SWIDTH in CH_CONTROL register, so read register value must be masked in addition to shifting.
Signed-off-by: Alban Bedel alban.bedel@avionic-design.de Signed-off-by: Tomasz Figa tomasz.figa@gmail.com
Acked-by: Linus Walleij linus.walleij@linaro.org
Are we just lucky on current variants such that all unmasked bits happen to be zero on them?
It's probably that all the places which this gets used, the transfers are 8-bit (like the UART) so it "just works" irrespective of that.