13 May
2015
13 May
'15
1:43 p.m.
On Wed, May 13, 2015 at 03:12:59PM +0800, Zidan Wang wrote:
When sai works on master mode, set its bit clock and frame clock.
SAI has 4 MCLK source, bus clock, MCLK1, MCLK2 and MCLK3. fsl_sai_set_bclk will select proper MCLK source, then calculate and set the bit clock divider.
This looks like a patch I've already applied? If there are any changes needed please send incremental fixes.