On 12/18/2012 10:59 PM, mengdong.lin@intel.com wrote:
From: Mengdong Lin mengdong.lin@intel.com
Haswell HDMI codec pins may report invalid connection list entries, which will cause failure to play audio via HDMI or Display Port.
So this patch adds fixup for Haswell to workaround this hardware issue: enable DP1.2 mode and override the pins' connection list entries with proper value.
Signed-off-by: Mengdong Lin mengdong.lin@intel.com Signed-off-by: Xingchao Wang xingchao.wang@intel.com
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c index 71555cc..59abe73 100644 --- a/sound/pci/hda/patch_hdmi.c +++ b/sound/pci/hda/patch_hdmi.c @@ -1687,6 +1687,30 @@ static const struct hda_codec_ops generic_hdmi_patch_ops = { .unsol_event = hdmi_unsol_event, };
+static void intel_haswell_fixup_connect_list(struct hda_codec *codec) +{
- unsigned int vendor_param;
- hda_nid_t list[3] = {0x2, 0x3, 0x4};
- vendor_param = snd_hda_codec_read(codec, 0x08, 0, 0xf81, 0);
- if (vendor_param == -1 || vendor_param & 0x02)
return;- /* enable DP1.2 mode */
- vendor_param |= 0x02;
- snd_hda_codec_read(codec, 0x08, 0, 0x781, vendor_param);
Hi,
When trying to get Haswell HDMI audio working, I discovered that this verb when executed can get pins to change state from D0 to D3.
As the fixup is executed after hda_call_codec_resume this means that the pins will remain in D3. I'm not entirely sure of this, but I think we have no runtime power transitions if we are on AC power, so this could potentially be for a very long time.
- /* override 3 pins connection list */
- snd_hda_override_conn_list(codec, 0x05, 3, list);
- snd_hda_override_conn_list(codec, 0x06, 3, list);
- snd_hda_override_conn_list(codec, 0x07, 3, list);
So before the DP 1.2 verb is executed, the connections are just 5 -> 2, 6 -> 3, 7 -> 4, but afterwards, every pin node can connect to every cvt node, and connection select verbs must change as a result?