Re: [PATCH] ASoC: wm8904: Fill the cache for WM8904_ADC_TEST_0 register

On Sun, Jul 23, 2023 at 12:27:22AM +0100, Mark Brown wrote:

The WM8904_ADC_TEST_0 register is modified as part of updating the OSR controls but does not have a cache default, leading to errors when we try to modify these controls in cache only mode with no prior read:

wm8904 3-001a: ASoC: error at snd_soc_component_update_bits on wm8904.3-001a for register: [0x000000c6] -16

Add a read of the register to probe() to fill the cache and avoid both the error messages and the misconfiguration of the chip which will result.

Signed-off-by: Mark Brown broonie@kernel.org

Acked-by: Charles Keepax ckeepax@opensource.cirrus.com

Thanks, Charles