From: Brent Lu brent.lu@intel.com
Remove SOF_RT5682_MCLK_24MHZ flag from JSL and CML/WHL board configs since the information could be retrieved from SOF API. The macro itself is removed as well.
Signed-off-by: Brent Lu brent.lu@intel.com Reviewed-by: Pierre-Louis Bossart pierre-louis.bossart@linux.intel.com Signed-off-by: Bard Liao yung-chuan.liao@linux.intel.com --- sound/soc/intel/boards/sof_rt5682.c | 122 ++++++++++++++-------------- 1 file changed, 59 insertions(+), 63 deletions(-)
diff --git a/sound/soc/intel/boards/sof_rt5682.c b/sound/soc/intel/boards/sof_rt5682.c index fae091b9b55c..b3e90794f4e6 100644 --- a/sound/soc/intel/boards/sof_rt5682.c +++ b/sound/soc/intel/boards/sof_rt5682.c @@ -34,7 +34,6 @@ #define SOF_RT5682_SSP_CODEC(quirk) ((quirk) & GENMASK(2, 0)) #define SOF_RT5682_SSP_CODEC_MASK (GENMASK(2, 0)) #define SOF_RT5682_MCLK_EN BIT(3) -#define SOF_RT5682_MCLK_24MHZ BIT(4) #define SOF_SPEAKER_AMP_PRESENT BIT(5) #define SOF_RT5682_SSP_AMP_SHIFT 6 #define SOF_RT5682_SSP_AMP_MASK (GENMASK(8, 6)) @@ -119,7 +118,6 @@ static const struct dmi_system_id sof_rt5682_quirk_table[] = { DMI_MATCH(DMI_PRODUCT_NAME, "WhiskeyLake Client"), }, .driver_data = (void *)(SOF_RT5682_MCLK_EN | - SOF_RT5682_MCLK_24MHZ | SOF_RT5682_SSP_CODEC(1)), }, { @@ -133,7 +131,6 @@ static const struct dmi_system_id sof_rt5682_quirk_table[] = { DMI_MATCH(DMI_PRODUCT_NAME, "Dooly"), }, .driver_data = (void *)(SOF_RT5682_MCLK_EN | - SOF_RT5682_MCLK_24MHZ | SOF_RT5682_SSP_CODEC(0) | SOF_SPEAKER_AMP_PRESENT | SOF_RT1015_SPEAKER_AMP_PRESENT | @@ -145,7 +142,6 @@ static const struct dmi_system_id sof_rt5682_quirk_table[] = { DMI_MATCH(DMI_PRODUCT_FAMILY, "Google_Hatch"), }, .driver_data = (void *)(SOF_RT5682_MCLK_EN | - SOF_RT5682_MCLK_24MHZ | SOF_RT5682_SSP_CODEC(0) | SOF_SPEAKER_AMP_PRESENT | SOF_RT5682_SSP_AMP(1)), @@ -295,51 +291,60 @@ static int sof_rt5682_codec_init(struct snd_soc_pcm_runtime *rtd) struct snd_soc_component *component = asoc_rtd_to_codec(rtd, 0)->component; struct snd_soc_jack *jack; int extra_jack_data; - int ret; + int ret, mclk_freq;
- /* need to enable ASRC function for 24MHz mclk rate */ - if ((sof_rt5682_quirk & SOF_RT5682_MCLK_EN) && - (sof_rt5682_quirk & SOF_RT5682_MCLK_24MHZ)) { - if (sof_rt5682_quirk & SOF_RT5682S_HEADPHONE_CODEC_PRESENT) - rt5682s_sel_asrc_clk_src(component, - RT5682S_DA_STEREO1_FILTER | - RT5682S_AD_STEREO1_FILTER, - RT5682S_CLK_SEL_I2S1_ASRC); - else if (sof_rt5682_quirk & SOF_RT5650_HEADPHONE_CODEC_PRESENT) { - rt5645_sel_asrc_clk_src(component, - RT5645_DA_STEREO_FILTER | - RT5645_AD_STEREO_FILTER, - RT5645_CLK_SEL_I2S1_ASRC); - rt5645_sel_asrc_clk_src(component, - RT5645_DA_MONO_L_FILTER | - RT5645_DA_MONO_R_FILTER, - RT5645_CLK_SEL_I2S2_ASRC); - } else - rt5682_sel_asrc_clk_src(component, - RT5682_DA_STEREO1_FILTER | - RT5682_AD_STEREO1_FILTER, - RT5682_CLK_SEL_I2S1_ASRC); - } + if (sof_rt5682_quirk & SOF_RT5682_MCLK_EN) { + mclk_freq = sof_dai_get_mclk(rtd); + if (mclk_freq <= 0) { + dev_err(rtd->dev, "invalid mclk freq %d\n", mclk_freq); + return -EINVAL; + }
- if (sof_rt5682_quirk & SOF_RT5682_MCLK_BYTCHT_EN) { - /* - * The firmware might enable the clock at - * boot (this information may or may not - * be reflected in the enable clock register). - * To change the rate we must disable the clock - * first to cover these cases. Due to common - * clock framework restrictions that do not allow - * to disable a clock that has not been enabled, - * we need to enable the clock first. - */ - ret = clk_prepare_enable(ctx->mclk); - if (!ret) - clk_disable_unprepare(ctx->mclk); + /* need to enable ASRC function for 24MHz mclk rate */ + if (mclk_freq == 24000000) { + dev_info(rtd->dev, "enable ASRC\n");
- ret = clk_set_rate(ctx->mclk, 19200000); + if (sof_rt5682_quirk & SOF_RT5682S_HEADPHONE_CODEC_PRESENT) + rt5682s_sel_asrc_clk_src(component, + RT5682S_DA_STEREO1_FILTER | + RT5682S_AD_STEREO1_FILTER, + RT5682S_CLK_SEL_I2S1_ASRC); + else if (sof_rt5682_quirk & SOF_RT5650_HEADPHONE_CODEC_PRESENT) { + rt5645_sel_asrc_clk_src(component, + RT5645_DA_STEREO_FILTER | + RT5645_AD_STEREO_FILTER, + RT5645_CLK_SEL_I2S1_ASRC); + rt5645_sel_asrc_clk_src(component, + RT5645_DA_MONO_L_FILTER | + RT5645_DA_MONO_R_FILTER, + RT5645_CLK_SEL_I2S2_ASRC); + } else + rt5682_sel_asrc_clk_src(component, + RT5682_DA_STEREO1_FILTER | + RT5682_AD_STEREO1_FILTER, + RT5682_CLK_SEL_I2S1_ASRC); + }
- if (ret) - dev_err(rtd->dev, "unable to set MCLK rate\n"); + if (sof_rt5682_quirk & SOF_RT5682_MCLK_BYTCHT_EN) { + /* + * The firmware might enable the clock at + * boot (this information may or may not + * be reflected in the enable clock register). + * To change the rate we must disable the clock + * first to cover these cases. Due to common + * clock framework restrictions that do not allow + * to disable a clock that has not been enabled, + * we need to enable the clock first. + */ + ret = clk_prepare_enable(ctx->mclk); + if (!ret) + clk_disable_unprepare(ctx->mclk); + + ret = clk_set_rate(ctx->mclk, 19200000); + + if (ret) + dev_err(rtd->dev, "unable to set MCLK rate\n"); + } }
/* @@ -413,17 +418,9 @@ static int sof_rt5682_hw_params(struct snd_pcm_substream *substream,
/* get the tplg configured mclk. */ pll_in = sof_dai_get_mclk(rtd); - - /* mclk from the quirk is the first choice */ - if (sof_rt5682_quirk & SOF_RT5682_MCLK_24MHZ) { - if (pll_in != 24000000) - dev_warn(rtd->dev, "configure wrong mclk in tplg, please use 24MHz.\n"); - pll_in = 24000000; - } else if (pll_in == 0) { - /* use default mclk if not specified correct in topology */ - pll_in = 19200000; - } else if (pll_in < 0) { - return pll_in; + if (pll_in <= 0) { + dev_err(rtd->dev, "invalid mclk freq %d\n", pll_in); + return -EINVAL; } } else { if (sof_rt5682_quirk & SOF_RT5682S_HEADPHONE_CODEC_PRESENT) @@ -451,7 +448,12 @@ static int sof_rt5682_hw_params(struct snd_pcm_substream *substream,
/* when MCLK is 512FS, no need to set PLL configuration additionally. */ if (pll_in == pll_out) - clk_id = RT5682S_SCLK_S_MCLK; + if (sof_rt5682_quirk & SOF_RT5682S_HEADPHONE_CODEC_PRESENT) + clk_id = RT5682S_SCLK_S_MCLK; + else if (sof_rt5682_quirk & SOF_RT5650_HEADPHONE_CODEC_PRESENT) + clk_id = RT5645_SCLK_S_MCLK; + else + clk_id = RT5682_SCLK_S_MCLK; else { /* Configure pll for codec */ ret = snd_soc_dai_set_pll(codec_dai, pll_id, pll_source, pll_in, @@ -1071,7 +1073,6 @@ static const struct platform_device_id board_ids[] = { { .name = "cml_rt1015_rt5682", .driver_data = (kernel_ulong_t)(SOF_RT5682_MCLK_EN | - SOF_RT5682_MCLK_24MHZ | SOF_RT5682_SSP_CODEC(0) | SOF_SPEAKER_AMP_PRESENT | SOF_RT1015_SPEAKER_AMP_PRESENT | @@ -1080,7 +1081,6 @@ static const struct platform_device_id board_ids[] = { { .name = "jsl_rt5682_rt1015", .driver_data = (kernel_ulong_t)(SOF_RT5682_MCLK_EN | - SOF_RT5682_MCLK_24MHZ | SOF_RT5682_SSP_CODEC(0) | SOF_SPEAKER_AMP_PRESENT | SOF_RT1015_SPEAKER_AMP_PRESENT | @@ -1089,7 +1089,6 @@ static const struct platform_device_id board_ids[] = { { .name = "jsl_rt5682_mx98360", .driver_data = (kernel_ulong_t)(SOF_RT5682_MCLK_EN | - SOF_RT5682_MCLK_24MHZ | SOF_RT5682_SSP_CODEC(0) | SOF_SPEAKER_AMP_PRESENT | SOF_MAX98360A_SPEAKER_AMP_PRESENT | @@ -1098,7 +1097,6 @@ static const struct platform_device_id board_ids[] = { { .name = "jsl_rt5682_rt1015p", .driver_data = (kernel_ulong_t)(SOF_RT5682_MCLK_EN | - SOF_RT5682_MCLK_24MHZ | SOF_RT5682_SSP_CODEC(0) | SOF_SPEAKER_AMP_PRESENT | SOF_RT1015P_SPEAKER_AMP_PRESENT | @@ -1107,7 +1105,6 @@ static const struct platform_device_id board_ids[] = { { .name = "jsl_rt5682", .driver_data = (kernel_ulong_t)(SOF_RT5682_MCLK_EN | - SOF_RT5682_MCLK_24MHZ | SOF_RT5682_SSP_CODEC(0)), }, { @@ -1271,7 +1268,6 @@ static const struct platform_device_id board_ids[] = { { .name = "jsl_rt5650", .driver_data = (kernel_ulong_t)(SOF_RT5682_MCLK_EN | - SOF_RT5682_MCLK_24MHZ | SOF_RT5682_SSP_CODEC(0) | SOF_SPEAKER_AMP_PRESENT | SOF_RT5682_SSP_AMP(1)),