After reading the sources (mainly sound/soc/atmel/atmel_ssc_dai.c), I don't understand how the right and left channel are synchronized. (which one will be on TF rising edge, and which one on TF falling edge ?) In the SSC_TCMR register, the start event is TF_FALLING when there only one channel (i.e. mono source always on left channel) With a stereo source, it's TF_EDGE (Detection of any edge on TF signal) ; so the samples are transferred on rising and falling edge. I didn't see anything in the SSC what could synchronize the first sample with a TF falling edge. Or I missed something ?
The codec seems to be set to I2S mode based on the parameter name. And the FSOS field in the TFMR is set to be negative pulse. So it matches the I2S mode diagram (Figure 27 of WM8731 datasheet). The high to low on DACLRC (TF line aka PA25 pin) indicate start of the left channel data. Looks like the TF signal is automatically generated by the SSC controller according to the TFMR settings.