9 Feb
2016
9 Feb
'16
3:45 a.m.
On Mon, Feb 08, 2016 at 04:43:04PM +0000, Mark Brown wrote:
On Fri, Feb 05, 2016 at 12:19:07PM +0530, Vinod Koul wrote:
From: "Dharageswari.R" dharageswari.r@intel.com
The SoC has MCLK output which is typically required by codecs. The MCLK is controlled by DSP FW, so driver can configure that by sending DMA_CONTROL IPC. The configuration for MCLK is present in the endpoint blob.
For integration with CODEC drivers this clock should really be exposed via the clock API too.
Ideally yes.
I think then the our driver should register as a clock provider too. I will check and see how we can get this done
Thanks
--
~Vinod