12 Jan
2022
12 Jan
'22
1:25 p.m.
On Wed, Jan 12, 2022 at 3:43 AM allen-kh.cheng allen-kh.cheng@mediatek.com wrote:
From: Allen-KH Cheng Allen-KH.Cheng@mediatek.com
Some of mediatek processors contain the Tensilica HiFix DSP for audio processing.
The communication between Host CPU and DSP firmware is taking place using a shared memory area for message passing.
ADSP IPC protocol offers (send/recv) interfaces using mediatek-mailbox APIs.
We use two mbox channels to implement a request-reply protocol.
Reviewed-by: Tzung-Bi Shih tzungbi@google.com Signed-off-by: Allen-KH Cheng Allen-KH.Cheng@mediatek.com
Reviewed-by: Curtis Malainey cujomalainey@chromium.org