From: Srinivasa Rao Mandadapu quic_srivasam@quicinc.com
Add "qcom,adsp-pil-mode" property in clock nodes for herobrine crd revision 3 board specific device tree. This is to register clocks conditionally by differentiating ADSP based platforms and legacy path platforms. Also disable lpass_core clock, as it is creating conflict with ADSP clocks and it is not required for ADSP based platforms.
Signed-off-by: Srinivasa Rao Mandadapu quic_srivasam@quicinc.com Signed-off-by: Mohammad Rafi Shaik quic_mohs@quicinc.com --- .../qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi index c02ca393378f..876a29178d46 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi @@ -197,6 +197,14 @@ q6prmcc: clock-controller { }; };
+&lpass_aon { + qcom,adsp-pil-mode; +}; + +&lpass_core { + status = "disabled"; +}; + &lpass_rx_macro { /delete-property/ power-domains; /delete-property/ power-domain-names; @@ -239,3 +247,7 @@ &lpass_va_macro {
status = "okay"; }; + +&lpasscc { + qcom,adsp-pil-mode; +};