Hi Philipp,
Thank again for the comments.
On Wed, Aug 14, 2013 at 02:06:24PM +0200, Philipp Zabel wrote:
================================================================== From i.MX53 reference manual:
0000 if (DPLL Locked) SPDIF_RxClk else extal 0001 if (DPLL Locked) SPDIF_RxClk else spdif_clk 0011 if (DPLL Locked) SPDIF_RxClk else asrc_clk 0100 if (DPLL Locked) SPDIF_Rxclk else esai_hckt 0101 extal_clk 0110 spdif_clk 1000 asrc_clk 1001 esai_hckt 1010 if (DPLL Locked) SPDIF_RxClk else mlb_clk 1011 if (DPLL Locked) SPDIF_RxClk else camp_clk 1100 mkb_clk 1101 camp_clk ==================================================================
To me this looks like the device tree should just contain the list of unique clock inputs using phandles. /* for i.MX6Q: */ clocks = <&...>; clock-names = "xtal", "spdif", "asrc", "spdif_ext", "esai", "mlb";
/* for i.MX53: */ clocks = <&...>; clock-names = "xtal", "spdif", "asrc", "esai", "mlb", "camp";
The driver could contain this list of named inputs to the multiplexer and the DPLL locking information for each SoC version. The per-clock DPLL locking bit shouldn't be in the device tree at all.
I understand your point. I'll put the DPLL-locking info to the driver. And I just found that the DPLL-lock condition seems to be fixed within the range -- {0x0 ~ 0x4, 0xa ~ 0xb} (I checked i.MX6Q/6SL/53/35, all of them are in such pattern.) So I don't need to put them into DT.
I'll revise it in next ver.
Thank you, Nicolin Chen