On Mon, Jun 09, 2014 at 07:43:14PM +0100, Mark Brown wrote:
On Mon, Jun 09, 2014 at 04:04:35PM +0100, Richard Fitzgerald wrote:
Using the driver for the internal regulator to also control the clock frequency of blocks inside the codec is an unexpected side-effect for a regulator, and also means that the core clocks won't be changed as expected if an external regulator is used to power the codec.
IIRC this was deliberately coded in this fashion on advice from the hardware engineers - there was more going on with that register than there might at first appear and some actual sync with the LDO. I believe there was some different process to follow (possibly just setting this mode all the time) when using an external regulator, though it's also possible the hardware guys were just unsure at the time.
I have had a good chat with the hardware engineers here and they are pretty adamant that the only constraint here is that we should never enable SUBSYS without 1.8V being supplied to the core.
They also believe that the external case should be handled the same as the internal one, although admittedly I haven't tested that personally.
This series needs a slight rebase and fixing up for my comment on one of the patches, but otherwise I think should be good in my opinion.
Thanks, Charles