Re: [PATCH 12/12] ASoC: amd: enable vangogh acp5x driver build

8 Jul 2021

      On 7/7/21 2:30 PM, kernel test robot wrote:
...
Hi Vijendar,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on asoc/for-next]
[also build test WARNING on v5.13 next-20210707]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit-scm.co...]
url:    https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com...
base:   https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.kernel... for-next
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
        # https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com...
        git remote add linux-review https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com...
        git fetch --no-tags linux-review Vijendar-Mukunda/Add-Vangogh-ACP-ASoC-driver/20210707-134319
        git checkout a7ec99c34f0da98bd5a9b2ccbf7ed5ec7e4f06b2
        # save the attached .config to linux build tree
        make W=1 ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot lkp@intel.com
All warnings (new ones prefixed by >>):
sound/soc/amd/vangogh/acp5x-i2s.c: In function 'acp5x_i2s_hwparams':
...
...
sound/soc/amd/vangogh/acp5x-i2s.c:87:26: warning: variable 'runtime' set but not used [-Wunused-but-set-variable]
  87 |  struct snd_pcm_runtime *runtime;
     |                          ^~~~~~~

will fix it and post the new version.
...
vim +/runtime +87 sound/soc/amd/vangogh/acp5x-i2s.c
a404cc43cb3075 Vijendar Mukunda 2021-07-07   81  
a404cc43cb3075 Vijendar Mukunda 2021-07-07   82  static int acp5x_i2s_hwparams(struct snd_pcm_substream *substream,
a404cc43cb3075 Vijendar Mukunda 2021-07-07   83  			      struct snd_pcm_hw_params *params,
a404cc43cb3075 Vijendar Mukunda 2021-07-07   84  			      struct snd_soc_dai *dai)
a404cc43cb3075 Vijendar Mukunda 2021-07-07   85  {
a404cc43cb3075 Vijendar Mukunda 2021-07-07   86  	struct i2s_stream_instance *rtd;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  @87  	struct snd_pcm_runtime *runtime;
a404cc43cb3075 Vijendar Mukunda 2021-07-07   88  	struct snd_soc_pcm_runtime *prtd;
a404cc43cb3075 Vijendar Mukunda 2021-07-07   89  	struct snd_soc_card *card;
a404cc43cb3075 Vijendar Mukunda 2021-07-07   90  	struct acp5x_platform_info *pinfo;
a404cc43cb3075 Vijendar Mukunda 2021-07-07   91  	struct i2s_dev_data *adata;
a404cc43cb3075 Vijendar Mukunda 2021-07-07   92  	union acp_i2stdm_mstrclkgen mclkgen;
a404cc43cb3075 Vijendar Mukunda 2021-07-07   93  
a404cc43cb3075 Vijendar Mukunda 2021-07-07   94  	u32 val;
a404cc43cb3075 Vijendar Mukunda 2021-07-07   95  	u32 reg_val, frmt_reg, master_reg;
a404cc43cb3075 Vijendar Mukunda 2021-07-07   96  	u32 lrclk_div_val, bclk_div_val;
a404cc43cb3075 Vijendar Mukunda 2021-07-07   97  
a404cc43cb3075 Vijendar Mukunda 2021-07-07   98  	lrclk_div_val = 0;
a404cc43cb3075 Vijendar Mukunda 2021-07-07   99  	bclk_div_val = 0;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  100  	runtime = substream->runtime;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  101  	prtd = asoc_substream_to_rtd(substream);
a404cc43cb3075 Vijendar Mukunda 2021-07-07  102  	rtd = substream->runtime->private_data;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  103  	card = prtd->card;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  104  	adata = snd_soc_dai_get_drvdata(dai);
a404cc43cb3075 Vijendar Mukunda 2021-07-07  105  	pinfo = snd_soc_card_get_drvdata(card);
a404cc43cb3075 Vijendar Mukunda 2021-07-07  106  	if (pinfo) {
a404cc43cb3075 Vijendar Mukunda 2021-07-07  107  		if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
a404cc43cb3075 Vijendar Mukunda 2021-07-07  108  			rtd->i2s_instance = pinfo->play_i2s_instance;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  109  		else
a404cc43cb3075 Vijendar Mukunda 2021-07-07  110  			rtd->i2s_instance = pinfo->cap_i2s_instance;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  111  	}
a404cc43cb3075 Vijendar Mukunda 2021-07-07  112  
a404cc43cb3075 Vijendar Mukunda 2021-07-07  113  	/* These values are as per Hardware Spec */
a404cc43cb3075 Vijendar Mukunda 2021-07-07  114  	switch (params_format(params)) {
a404cc43cb3075 Vijendar Mukunda 2021-07-07  115  	case SNDRV_PCM_FORMAT_U8:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  116  	case SNDRV_PCM_FORMAT_S8:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  117  		rtd->xfer_resolution = 0x0;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  118  		break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  119  	case SNDRV_PCM_FORMAT_S16_LE:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  120  		rtd->xfer_resolution = 0x02;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  121  		break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  122  	case SNDRV_PCM_FORMAT_S24_LE:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  123  		rtd->xfer_resolution = 0x04;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  124  		break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  125  	case SNDRV_PCM_FORMAT_S32_LE:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  126  		rtd->xfer_resolution = 0x05;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  127  		break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  128  	default:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  129  		return -EINVAL;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  130  	}
a404cc43cb3075 Vijendar Mukunda 2021-07-07  131  	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
a404cc43cb3075 Vijendar Mukunda 2021-07-07  132  		switch (rtd->i2s_instance) {
a404cc43cb3075 Vijendar Mukunda 2021-07-07  133  		case I2S_HS_INSTANCE:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  134  			reg_val = ACP_HSTDM_ITER;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  135  			frmt_reg = ACP_HSTDM_TXFRMT;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  136  			break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  137  		case I2S_SP_INSTANCE:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  138  		default:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  139  			reg_val = ACP_I2STDM_ITER;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  140  			frmt_reg = ACP_I2STDM_TXFRMT;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  141  		}
a404cc43cb3075 Vijendar Mukunda 2021-07-07  142  	} else {
a404cc43cb3075 Vijendar Mukunda 2021-07-07  143  		switch (rtd->i2s_instance) {
a404cc43cb3075 Vijendar Mukunda 2021-07-07  144  		case I2S_HS_INSTANCE:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  145  			reg_val = ACP_HSTDM_IRER;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  146  			frmt_reg = ACP_HSTDM_RXFRMT;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  147  			break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  148  		case I2S_SP_INSTANCE:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  149  		default:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  150  			reg_val = ACP_I2STDM_IRER;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  151  			frmt_reg = ACP_I2STDM_RXFRMT;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  152  		}
a404cc43cb3075 Vijendar Mukunda 2021-07-07  153  	}
a404cc43cb3075 Vijendar Mukunda 2021-07-07  154  	if (adata->tdm_mode) {
a404cc43cb3075 Vijendar Mukunda 2021-07-07  155  		val = acp_readl(rtd->acp5x_base + reg_val);
a404cc43cb3075 Vijendar Mukunda 2021-07-07  156  		acp_writel(val | 0x2, rtd->acp5x_base + reg_val);
a404cc43cb3075 Vijendar Mukunda 2021-07-07  157  		acp_writel(adata->tdm_fmt, rtd->acp5x_base + frmt_reg);
a404cc43cb3075 Vijendar Mukunda 2021-07-07  158  	}
a404cc43cb3075 Vijendar Mukunda 2021-07-07  159  	val = acp_readl(rtd->acp5x_base + reg_val);
a404cc43cb3075 Vijendar Mukunda 2021-07-07  160  	val &= ~ACP5x_ITER_IRER_SAMP_LEN_MASK;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  161  	val = val | (rtd->xfer_resolution  << 3);
a404cc43cb3075 Vijendar Mukunda 2021-07-07  162  	acp_writel(val, rtd->acp5x_base + reg_val);
a404cc43cb3075 Vijendar Mukunda 2021-07-07  163  
a404cc43cb3075 Vijendar Mukunda 2021-07-07  164  	if (adata->master_mode) {
a404cc43cb3075 Vijendar Mukunda 2021-07-07  165  		switch (rtd->i2s_instance) {
a404cc43cb3075 Vijendar Mukunda 2021-07-07  166  		case I2S_HS_INSTANCE:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  167  			master_reg = ACP_I2STDM2_MSTRCLKGEN;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  168  			break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  169  		case I2S_SP_INSTANCE:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  170  		default:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  171  			master_reg = ACP_I2STDM0_MSTRCLKGEN;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  172  			break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  173  		}
a404cc43cb3075 Vijendar Mukunda 2021-07-07  174  		mclkgen.bits.i2stdm_master_mode = 0x1;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  175  		if (adata->tdm_mode)
a404cc43cb3075 Vijendar Mukunda 2021-07-07  176  			mclkgen.bits.i2stdm_format_mode = 0x01;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  177  		else
a404cc43cb3075 Vijendar Mukunda 2021-07-07  178  			mclkgen.bits.i2stdm_format_mode = 0x0;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  179  		switch (params_format(params)) {
a404cc43cb3075 Vijendar Mukunda 2021-07-07  180  		case SNDRV_PCM_FORMAT_S16_LE:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  181  			switch (params_rate(params)) {
a404cc43cb3075 Vijendar Mukunda 2021-07-07  182  			case 8000:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  183  				bclk_div_val = 768;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  184  				break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  185  			case 16000:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  186  				bclk_div_val = 384;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  187  				break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  188  			case 24000:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  189  				bclk_div_val = 256;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  190  				break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  191  			case 32000:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  192  				bclk_div_val = 192;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  193  				break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  194  			case 44100:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  195  			case 48000:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  196  				bclk_div_val = 128;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  197  				break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  198  			case 88200:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  199  			case 96000:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  200  				bclk_div_val = 64;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  201  				break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  202  			case 192000:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  203  				bclk_div_val = 32;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  204  				break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  205  			default:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  206  				return -EINVAL;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  207  			}
a404cc43cb3075 Vijendar Mukunda 2021-07-07  208  			lrclk_div_val = 32;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  209  			break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  210  		case SNDRV_PCM_FORMAT_S32_LE:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  211  			switch (params_rate(params)) {
a404cc43cb3075 Vijendar Mukunda 2021-07-07  212  			case 8000:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  213  				bclk_div_val = 384;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  214  				break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  215  			case 16000:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  216  				bclk_div_val = 192;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  217  				break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  218  			case 24000:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  219  				bclk_div_val = 128;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  220  				break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  221  			case 32000:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  222  				bclk_div_val = 96;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  223  				break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  224  			case 44100:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  225  			case 48000:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  226  				bclk_div_val = 64;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  227  				break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  228  			case 88200:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  229  			case 96000:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  230  				bclk_div_val = 32;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  231  				break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  232  			case 192000:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  233  				bclk_div_val = 16;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  234  				break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  235  			default:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  236  				return -EINVAL;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  237  			}
a404cc43cb3075 Vijendar Mukunda 2021-07-07  238  			lrclk_div_val = 64;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  239  			break;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  240  		default:
a404cc43cb3075 Vijendar Mukunda 2021-07-07  241  			return -EINVAL;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  242  		}
a404cc43cb3075 Vijendar Mukunda 2021-07-07  243  		mclkgen.bits.i2stdm_bclk_div_val = bclk_div_val;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  244  		mclkgen.bits.i2stdm_lrclk_div_val = lrclk_div_val;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  245  		acp_writel(mclkgen.u32_all, rtd->acp5x_base + master_reg);
a404cc43cb3075 Vijendar Mukunda 2021-07-07  246  	}
a404cc43cb3075 Vijendar Mukunda 2021-07-07  247  	return 0;
a404cc43cb3075 Vijendar Mukunda 2021-07-07  248  }
a404cc43cb3075 Vijendar Mukunda 2021-07-07  249

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Re: [PATCH 12/12] ASoC: amd: enable vangogh acp5x driver build

Mukunda,Vijendar