22 Feb
2011
22 Feb
'11
7:27 a.m.
Hi,
On 02/20/11 06:01, ext ylin@mail.com wrote:
Or can you share the relevant configuration (from your machine
driver)
with us?
And, these are McBSP2 registers with both Tx and Rx audio running. **** McBSP2 regs **** DRR2: 0xffee DRR1: 0x0000 DXR2: 0x0000 DXR1: 0x0000 SPCR2: 0x02f5 SPCR1: 0x0031 RCR2: 0x8041 RCR1: 0x0040 XCR2: 0x8041 XCR1: 0x0040 SRGR2: 0x001f SRGR1: 0x0f00 PCR0: 0x000f
Both the twl and McBSP config seams to be in sync. I do not see anything, which stands out...
I think you need to implement the PRCM compliant interrupt config to check for McBSP underflow/overflow.
I'll try to resurrect my Beagle board, since that as well have the twl codec on McBSP2...
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