27 May
2023
27 May
'23
12:36 p.m.
On 15-05-23, 15:10, Bard Liao wrote:
This series uses the abstraction added in past kernel cycles to provide support for the ACE2.x integration. The existing SHIM and Cadence registers are now split in 3 (SHIM, IP, SHIM vendor-specific), with some parts also moved to the HDaudio Extended Multi link structures. Nothing fundamentally different except for the register map.
This series only provides the basic mechanisms to expose SoundWire-based DAIs. The PCI parts and DSP management will be contributed later, and the DAI ops are now empty as well.
The change is mainly on SoundWire. It would be better to go through SoundWire tree.
Applied, thanks
--
~Vinod