Hi Trevor,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on broonie-sound/for-next] [also build test ERROR on broonie-spi/for-next tiwai-sound/for-next linus/master v6.1-rc1 next-20221021] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Trevor-Wu/ASoC-mediatek-Add-s... base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next patch link: https://lore.kernel.org/r/20221021082719.18325-9-trevor.wu%40mediatek.com patch subject: [PATCH v2 08/12] ASoC: mediatek: mt8188: add platform driver config: powerpc-allmodconfig compiler: powerpc-linux-gcc (GCC) 12.1.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/b35f8a277cd1f8315cc41e045e2cd4... git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Trevor-Wu/ASoC-mediatek-Add-support-for-MT8188-SoC/20221021-163042 git checkout b35f8a277cd1f8315cc41e045e2cd4ed1d9521b1 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=powerpc SHELL=/bin/bash sound/soc/mediatek/mt8188/
If you fix the issue, kindly add following tag where applicable | Reported-by: kernel test robot lkp@intel.com
All errors (new ones prefixed by >>):
sound/soc/mediatek/mt8188/mt8188-dai-adda.c: In function 'mt8188_adda_mtkaif_init':
sound/soc/mediatek/mt8188/mt8188-dai-adda.c:152:16: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
152 | val |= FIELD_PREP(MTKAIF_RXIF_DELAY_CYCLE_MASK, delay_cycle); | ^~~~~~~~~~ cc1: some warnings being treated as errors -- sound/soc/mediatek/mt8188/mt8188-dai-etdm.c: In function 'mt8188_etdm_clk_src_sel_put':
sound/soc/mediatek/mt8188/mt8188-dai-etdm.c:595:23: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
595 | val = FIELD_PREP(ETDM_OUT_CON4_CLOCK_MASK, source); | ^~~~~~~~~~ cc1: some warnings being treated as errors -- sound/soc/mediatek/mt8188/mt8188-dai-pcm.c: In function 'mtk_dai_pcm_configure':
sound/soc/mediatek/mt8188/mt8188-dai-pcm.c:150:16: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
150 | val |= FIELD_PREP(PCM_INTF_CON2_SYNC_FREQ_MODE_MASK, fs); | ^~~~~~~~~~ cc1: some warnings being treated as errors
vim +/FIELD_PREP +152 sound/soc/mediatek/mt8188/mt8188-dai-adda.c
9f27f29a0938fd Trevor Wu 2022-10-21 115 9f27f29a0938fd Trevor Wu 2022-10-21 116 static int mt8188_adda_mtkaif_init(struct mtk_base_afe *afe) 9f27f29a0938fd Trevor Wu 2022-10-21 117 { 9f27f29a0938fd Trevor Wu 2022-10-21 118 struct mt8188_afe_private *afe_priv = afe->platform_priv; 9f27f29a0938fd Trevor Wu 2022-10-21 119 struct mtkaif_param *param = &afe_priv->mtkaif_params; 9f27f29a0938fd Trevor Wu 2022-10-21 120 int delay_data; 9f27f29a0938fd Trevor Wu 2022-10-21 121 int delay_cycle; 9f27f29a0938fd Trevor Wu 2022-10-21 122 unsigned int mask = 0; 9f27f29a0938fd Trevor Wu 2022-10-21 123 unsigned int val = 0; 9f27f29a0938fd Trevor Wu 2022-10-21 124 9f27f29a0938fd Trevor Wu 2022-10-21 125 /* set rx protocol 2 & mtkaif_rxif_clkinv_adc inverse */ 9f27f29a0938fd Trevor Wu 2022-10-21 126 regmap_set_bits(afe->regmap, AFE_ADDA_MTKAIF_CFG0, 9f27f29a0938fd Trevor Wu 2022-10-21 127 MTKAIF_RXIF_CLKINV_ADC | MTKAIF_RXIF_PROTOCOL2); 9f27f29a0938fd Trevor Wu 2022-10-21 128 9f27f29a0938fd Trevor Wu 2022-10-21 129 regmap_set_bits(afe->regmap, AFE_AUD_PAD_TOP, RG_RX_PROTOCOL2); 9f27f29a0938fd Trevor Wu 2022-10-21 130 9f27f29a0938fd Trevor Wu 2022-10-21 131 if (!param->mtkaif_calibration_ok) { 9f27f29a0938fd Trevor Wu 2022-10-21 132 dev_info(afe->dev, "%s(), calibration fail\n", __func__); 9f27f29a0938fd Trevor Wu 2022-10-21 133 return 0; 9f27f29a0938fd Trevor Wu 2022-10-21 134 } 9f27f29a0938fd Trevor Wu 2022-10-21 135 9f27f29a0938fd Trevor Wu 2022-10-21 136 /* set delay for ch1, ch2 */ 9f27f29a0938fd Trevor Wu 2022-10-21 137 if (param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_0] >= 9f27f29a0938fd Trevor Wu 2022-10-21 138 param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_1]) { 9f27f29a0938fd Trevor Wu 2022-10-21 139 delay_data = DELAY_DATA_MISO1; 9f27f29a0938fd Trevor Wu 2022-10-21 140 delay_cycle = 9f27f29a0938fd Trevor Wu 2022-10-21 141 param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_0] - 9f27f29a0938fd Trevor Wu 2022-10-21 142 param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_1]; 9f27f29a0938fd Trevor Wu 2022-10-21 143 } else { 9f27f29a0938fd Trevor Wu 2022-10-21 144 delay_data = DELAY_DATA_MISO0; 9f27f29a0938fd Trevor Wu 2022-10-21 145 delay_cycle = 9f27f29a0938fd Trevor Wu 2022-10-21 146 param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_1] - 9f27f29a0938fd Trevor Wu 2022-10-21 147 param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_0]; 9f27f29a0938fd Trevor Wu 2022-10-21 148 } 9f27f29a0938fd Trevor Wu 2022-10-21 149 9f27f29a0938fd Trevor Wu 2022-10-21 150 val = 0; 9f27f29a0938fd Trevor Wu 2022-10-21 151 mask = (MTKAIF_RXIF_DELAY_DATA | MTKAIF_RXIF_DELAY_CYCLE_MASK); 9f27f29a0938fd Trevor Wu 2022-10-21 @152 val |= FIELD_PREP(MTKAIF_RXIF_DELAY_CYCLE_MASK, delay_cycle); 9f27f29a0938fd Trevor Wu 2022-10-21 153 val |= FIELD_PREP(MTKAIF_RXIF_DELAY_DATA, delay_data); 9f27f29a0938fd Trevor Wu 2022-10-21 154 regmap_update_bits(afe->regmap, AFE_ADDA_MTKAIF_RX_CFG2, mask, val); 9f27f29a0938fd Trevor Wu 2022-10-21 155 9f27f29a0938fd Trevor Wu 2022-10-21 156 return 0; 9f27f29a0938fd Trevor Wu 2022-10-21 157 } 9f27f29a0938fd Trevor Wu 2022-10-21 158