i.MX8MQ/MN/MM/MP platforms typically have 2 AUDIO PLLs being configured to handle 8kHz and 11kHz series audio rates.
The patches implement the functionality to select at runtime the appropriate AUDIO PLL for root clock, if there is no two PLL registered, then no action taken.
Shengjiu Wang (6): ASoC: fsl_utils: Add function to handle PLL clock source ASoC: fsl_spdif: Add support for PLL switch at runtime. ASoC: fsl_micfil: Add support for PLL switch at runtime ASoC: fsl_sai: Add support for PLL switch at runtime ASoC: dt-bindings: fsl_spdif: Add two PLL clock source ASoC: dt-bindings: fsl-sai: Add two PLL clock source
.../devicetree/bindings/sound/fsl,spdif.yaml | 4 ++ .../devicetree/bindings/sound/fsl-sai.txt | 3 + sound/soc/fsl/Kconfig | 3 + sound/soc/fsl/fsl_micfil.c | 41 +++++++++++ sound/soc/fsl/fsl_sai.c | 54 +++++++++++++++ sound/soc/fsl/fsl_sai.h | 2 + sound/soc/fsl/fsl_spdif.c | 57 +++++++++++++-- sound/soc/fsl/fsl_utils.c | 69 +++++++++++++++++++ sound/soc/fsl/fsl_utils.h | 9 +++ 9 files changed, 237 insertions(+), 5 deletions(-)