Mark Brown broonie@opensource.wolfsonmicro.com writes:
On Mon, Apr 04, 2011 at 05:13:00PM +0200, Arnaud Patard wrote:
/* default value of sgtl5000 registers except DAP */ -static const u16 sgtl5000_regs[SGTL5000_MAX_REG_OFFSET >> 1] = { +static const u16 sgtl5000_regs[SGTL5000_MAX_REG_OFFSET] = { 0xa011, /* 0x0000, CHIP_ID. 11 stand for revison 17 */
- 0,
It's not immediately obvious that this is the best fix - the driver does declare a step of 2 so I'd expect it to be able to lay out the cahce defaults like this. Also, it'd be easier to review the patch if you
The sgtl5000 driver is using:
static const u16 sgtl5000_regs[SGTL5000_MAX_REG_OFFSET >> 1] = { ... };
...
.reg_cache_size = ARRAY_SIZE(sgtl5000_regs),
Which means that reg cache size is SGTL5000_MAX_REG_OFFSET / 2 and register values stored without any "holes" in the array, except that in flat cache case, ASoC does :
static int snd_soc_flat_cache_read(struct snd_soc_codec *codec, unsigned int reg, unsigned int *value) { *value = snd_soc_get_cache_val(codec->reg_cache, reg, codec->driver->reg_word_size); return 0; }
and snd_soc_get_cache_val returns cache[reg] which means that the cache size must have a length of SGTL5000_MAX_REG_OFFSET and values stored with "holes".
Also, without this change, the codec_reg debugfs files is returning lines like : 0000: a0 instead of : 0000: a011
This is also the reason why resume was broken: the restored values were not the right ones. Look at the restore regs code: instead of reading cache[reg] like snd_soc_get_cache_val, it was reading cache[reg>>1].
Arnaud