On Wed, May 08, 2013 at 03:59:19PM +0100, Mark Brown wrote:
On Wed, May 08, 2013 at 07:26:22AM -0700, Eric Nelson wrote:
An initial pass of writing all of the default register values with a sort of 'cache flush' appears to be the right thing.
Then it doesn't even matter if the values match the datasheet, or if the spec changes over time. If the values are reasonable, the device will function properly.
No, it does matter - when we do things like cache syncs on resume the core will suppress writes of registers which have their power on value since either the register will have been reset to that value by power loss or retained the value due to power being maintained. This is a useful win when resuming to audio activity, I2C is pretty slow.
Actually the simplest way to implement this solution (at least with regmap, IIRC there might've been some issues with the ASoC cache code) is just to discard the register defaults. The core will fall back to reading the hardware for any register it doesn't have cached but will continue to cache values that are written.
Something that iterates all the known registers and reads the default values in will be required in order to support control access with the device powered down. I'd therefore suggest just not telling regmap about the current defaults and instead changing the code to loop over them and write them out during startup. Probably with a big fat comment about why we're doing this.