20 Oct
2023
20 Oct
'23
8:28 a.m.
Increase DSP cache window range to 2.5MB to align with ACP memory.
Signed-off-by: Vijendar Mukunda Vijendar.Mukunda@amd.com --- sound/soc/sof/amd/acp.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/sof/amd/acp.h b/sound/soc/sof/amd/acp.h index 3d2c5f07ed44..205b434f0872 100644 --- a/sound/soc/sof/amd/acp.h +++ b/sound/soc/sof/amd/acp.h @@ -84,7 +84,7 @@ #define EXCEPT_MAX_HDR_SIZE 0x400 #define AMD_STACK_DUMP_SIZE 32
-#define SRAM1_SIZE 0x13A000 +#define SRAM1_SIZE 0x280000 #define PROBE_STATUS_BIT BIT(31)
#define ACP_FIRMWARE_SIGNATURE 0x100
--
2.34.1