Thanks for an update I will comment all the patches. Here we start.
Thanks Andy for the review. Two quick comments before going further in the details later.
The BayTrail and CherryTrail platforms provide platform clocks through their Power Management Controller (PMC).
The SoC supports up to 6 clocks (PMC_PLT_CLK[5:0]) with a frequency of either 19.2 MHz (PLL) or 25 MHz (XTAL) for BayTrail and a frequency of 19.2 MHz (XTAL) for CherryTrail. These clocks are available for general system use, where appropriate, and each have Control & Frequency register fields associated with them.
Signed-off-by: Irina Tirdea irina.tirdea@intel.com Signed-off-by: Pierre-Louis Bossart pierre-louis.bossart@linux.intel.com
Who is the actual author? SoB I guess should be either the author, or 1st, 2nd, ..., last one who is submitter.
I ported the initial code from Android legacy stuff and Irina ported the functionality to the clk framework. It seems appropriate to have both signed-offs?
[snip]
+#include <linux/platform_data/x86/clk-byt-plt.h>
This was a suggestion of Darren Hart in agreement with Thomas Gleixner. see http://mailman.alsa-project.org/pipermail/alsa-devel/2016-October/113936.htm...
Darren, did we get your proposal right?
Is it indeed platform data? I would not create platform_data/x86 without strong argument. Perhaps include/linux/clk/x86_pmc.h? (Yes, I know about clk-lpss.h which is old enough and was basically first try of clk stuff on x86)