AHUB driver misses D_AUDIO and APBIF resets. CPU hangs on trying to access hardware if resets aren't de-asserted. This problem is currently masked by the tegra-clk driver which implicitly de-asserts the resets when the corresponding clocks are enabled. Soon the implicit de-assertion will be gone from the tegra-clk driver, thus we need to fix the AHUB driver. Add the missing resets to the driver.
Tested-by: Peter Geis pgwipeout@gmail.com # Ouya T30 audio works Tested-by: Matt Merhar mattmerhar@protonmail.com # Ouya T30 boot-tested Tested-by: Dmitry Osipenko digetx@gmail.com # Nexus7 T30 audio works Tested-by: Nicolas Chauvet kwizart@gmail.com # TK1 boot-tested Signed-off-by: Dmitry Osipenko digetx@gmail.com --- sound/soc/tegra/tegra30_ahub.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c index 156e3b9d613c..8c32333cc08c 100644 --- a/sound/soc/tegra/tegra30_ahub.c +++ b/sound/soc/tegra/tegra30_ahub.c @@ -337,6 +337,8 @@ static const struct { const char *rst_name; u32 mod_list_mask; } configlink_mods[] = { + { "d_audio", MOD_LIST_MASK_TEGRA30_OR_LATER }, + { "apbif", MOD_LIST_MASK_TEGRA30_OR_LATER }, { "i2s0", MOD_LIST_MASK_TEGRA30_OR_LATER }, { "i2s1", MOD_LIST_MASK_TEGRA30_OR_LATER }, { "i2s2", MOD_LIST_MASK_TEGRA30_OR_LATER },