On 6/10/2019 10:56 AM, Cheng-yi Chiang wrote:
On Mon, Jun 10, 2019 at 10:40 AM John Hsu KCHSU0@nuvoton.com wrote:
There is no pull-up resistor at IRQ line where it connects from the codec to SoC. When booting, the signal of IRQ pin will keep low which makes the SoC invoke the ISR repeatedly because the IRQ is registered trigger low. It will not stop until the codec sets up the interruption and pulls the signal high. In the patch, nau8825 will internally pull the signal to high at booting in case the fake interrupts happen.
What steps will reproduce the problem? Boot device What is the expected output? A lot of interrupts without any events What do you see instead? The fake interrupts are gone How frequently does this problem reproduce? Always
I guess you don't need these descriptions.
Yes, I add it by referring to the comment of ChromeOS.
I can remove it.
Signed-off-by: John Hsu KCHSU0@nuvoton.com
Please add my Tested-by. Thanks!
OK, I will add it.
sound/soc/codecs/nau8825.c | 4 ++++ sound/soc/codecs/nau8825.h | 2 ++ 2 files changed, 6 insertions(+)
diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index 47e65cf99879..83ec841f7865 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c @@ -1881,6 +1881,10 @@ static void nau8825_init_regs(struct nau8825 *nau8825) NAU8825_JACK_EJECT_DEBOUNCE_MASK, nau8825->jack_eject_debounce << NAU8825_JACK_EJECT_DEBOUNCE_SFT);
/* Pull up IRQ pin */
regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK,
NAU8825_IRQ_PIN_PULLUP | NAU8825_IRQ_PIN_PULL_EN,
NAU8825_IRQ_PIN_PULLUP | NAU8825_IRQ_PIN_PULL_EN); /* Mask unneeded IRQs: 1 - disable, 0 - enable */ regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, 0x7ff, 0x7ff);
diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h index f6074c618569..3f41897ed3f6 100644 --- a/sound/soc/codecs/nau8825.h +++ b/sound/soc/codecs/nau8825.h @@ -171,6 +171,8 @@ #define NAU8825_JACK_POLARITY (1 << 1) /* 0 - active low, 1 - active high */
/* INTERRUPT_MASK (0xf) */ +#define NAU8825_IRQ_PIN_PULLUP (1 << 14) +#define NAU8825_IRQ_PIN_PULL_EN (1 << 13) #define NAU8825_IRQ_OUTPUT_EN (1 << 11) #define NAU8825_IRQ_HEADSET_COMPLETE_EN (1 << 10)
#define NAU8825_IRQ_RMS_EN (1 << 8)
2.21.0
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