McBSP is able to drive bit clock and consume frame clock but BP_FC format is not handled by McBSP driver.
Add BP_FC format support. When BP_FC is selected: - CLKX and CLKR are configured as outputs - The sample rate generator is configured to be able to provide bit clock.
Signed-off-by: Bastien Curutchet bastien.curutchet@bootlin.com --- sound/soc/ti/davinci-i2s.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
diff --git a/sound/soc/ti/davinci-i2s.c b/sound/soc/ti/davinci-i2s.c index 4adaed010700..7cdd86f47ead 100644 --- a/sound/soc/ti/davinci-i2s.c +++ b/sound/soc/ti/davinci-i2s.c @@ -306,6 +306,12 @@ static int davinci_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai, pcr = DAVINCI_MCBSP_PCR_FSRM | DAVINCI_MCBSP_PCR_FSXM; pcr |= DAVINCI_MCBSP_PCR_SCLKME; break; + case SND_SOC_DAIFMT_BP_FC: + /* cpu is bitclock provider */ + pcr = DAVINCI_MCBSP_PCR_CLKXM | + DAVINCI_MCBSP_PCR_CLKRM; + break; + case SND_SOC_DAIFMT_BC_FC: /* codec is master */ pcr = 0; @@ -491,6 +497,23 @@ static int davinci_i2s_hw_params(struct snd_pcm_substream *substream, clk_div &= 0xFF; srgr |= clk_div; break; + case SND_SOC_DAIFMT_BP_FC: + if (dev->ext_clk) { + freq = clk_get_rate(dev->ext_clk); + } else { + freq = clk_get_rate(dev->clk); + srgr = DAVINCI_MCBSP_SRGR_CLKSM; + } + if (dev->tdm_slots && dev->slot_width) { + clk_div = freq / (params->rate_num * params->rate_den) + / (dev->tdm_slots * dev->slot_width) - 1; + } else { + clk_div = freq / (mcbsp_word_length * 16) / + params->rate_num * params->rate_den; + } + clk_div &= 0xFF; + srgr |= clk_div; + break; case SND_SOC_DAIFMT_BC_FC: /* Clock and frame sync given from external sources */ i = hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS);