On Tue, Jul 19, 2011 at 04:13:37PM +0100, Mark Brown wrote:
On Tue, Jul 19, 2011 at 11:04:04AM +0200, Wolfram Sang wrote:
pls check http://comments.gmane.org/gmane.linux.alsa.devel/83781 I think Mark is right, sgtl5000 already declared its register_step is 2, soc_cache.c should generate a dense cache layout instead of padding it by driver.Thanks for the pointer. I can follow Mark's reasoning. In fact, I was wondering why ASoC does not consider the step, but I assumed it was intentional. With my holidays coming along, nothing I am going to tackle in the next time, though ;)
The only reason steps are ever used is for AC'97 devices which don't use the generic cache code as they're pretty much obsolete so the framework support is mostly just carried around as legacy. The step size is used in the cache display code which does use it. If someone was interested enough to convert AC'97 over that'd be nice.
I am a bit confused now: Do you want to retire the step size in the long run? Then my sgtl-patch might be the right approach after all.