On Wed, Mar 30, 2016 at 05:46:01PM +0200, Takashi Iwai wrote:
This patch fills the holes and now all i915 HDMI/DP codecs are managed over the audio ELD notifier, finally. The old gen3/gen4 chips have usually only a single pin/converter pair, and the digital port mapping is fixed.
Signed-off-by: Takashi Iwai tiwai@suse.de
sound/hda/hdac_i915.c | 11 +++++++++++ sound/pci/hda/patch_hdmi.c | 21 +++++++++++++++------ 2 files changed, 26 insertions(+), 6 deletions(-)
diff --git a/sound/hda/hdac_i915.c b/sound/hda/hdac_i915.c index d0da2508823e..c62a9f830b84 100644 --- a/sound/hda/hdac_i915.c +++ b/sound/hda/hdac_i915.c @@ -128,6 +128,9 @@ EXPORT_SYMBOL_GPL(snd_hdac_get_display_clk);
- Pin Widget 4 - PORT B (port = 1 in i915 driver)
- Pin Widget 5 - PORT C (port = 2 in i915 driver)
- Pin Widget 6 - PORT D (port = 3 in i915 driver)
- on earlier models:
- Pin Widget 3 - PORT B
Hmm. ctg/elk have potentially multiple HDMI ports. Although they only have one video DIP block so can send infoframes only to one of the ports at a time. I wonder how this relates to the audio part, as in does the pin widget 3 always map to the port that is getting infoframes currently? I do have one elk with two HDMI ports here so I could do some experiments if needed.
*/ static int pin2port(struct hdac_device *codec, hda_nid_t pin_nid) { @@ -139,6 +142,14 @@ static int pin2port(struct hdac_device *codec, hda_nid_t pin_nid) case 0x80862882: /* VLV */ base_nid = 3; break;
- case 0x80862801: /* Bearlake */
Hmm. I wonder if this is bearlake-C or something earlier. BLC doesn't actually exist AFAIK, and earlier bearlake is gen3 and doesn't even support native HDMI output so not sure what this is doing here.
- case 0x80862802: /* Cantiga */
- case 0x80862803: /* Eaglelake */
- case 0x80862880: /* CedarTrail */
Cedartrail is some powervr atom thing. Should have nothing to do with i915.
- case 0x808629fb: /* Crestline HDMI */
CL is gen4 and we don't support native HDMI output on those. Strangely enough our spec says CL/BW do support TMDS encoding on the SDVO/HDMI ports and that CL also has the video DIP block and the HDA registers. Not sure what to make of that really.
if (WARN_ON(pin_nid != 0x03))return -1;return 1; /* only port B */diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c index 4833c7bdd1e8..2a3bf1584f3b 100644 --- a/sound/pci/hda/patch_hdmi.c +++ b/sound/pci/hda/patch_hdmi.c @@ -2286,6 +2286,15 @@ static void intel_pin_eld_notify(void *audio_ptr, int port) case 0x80862882: /* VLV */ pin_nid = port + 0x03; break;
- case 0x80862801: /* Bearlake */
- case 0x80862802: /* Cantiga */
- case 0x80862803: /* Eaglelake */
- case 0x80862880: /* CedarTrail */
- case 0x808629fb: /* Crestline HDMI */
if (WARN_ON(port != 1)) /* assume only port B */return;pin_nid = 0x03;break;@@ -2424,7 +2433,7 @@ static int patch_i915_byt_hdmi(struct hda_codec *codec) return 0; }
-/* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */ +/* Intel Gen3/Gen4, IronLake, SandyBridge and IvyBridge; with eld notifier */ static int patch_i915_cpt_hdmi(struct hda_codec *codec) { struct hdmi_spec *spec; @@ -3627,9 +3636,9 @@ HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP", patch_via_hdmi), HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP", patch_generic_hdmi), HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP", patch_generic_hdmi), HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI", patch_i915_cpt_hdmi), -HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI", patch_generic_hdmi), -HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI", patch_generic_hdmi), -HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI", patch_generic_hdmi), +HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI", patch_i915_cpt_hdmi), +HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI", patch_i915_cpt_hdmi), +HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI", patch_i915_cpt_hdmi), HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI", patch_i915_cpt_hdmi), HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi), HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi), @@ -3638,10 +3647,10 @@ HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI", patch_i915_hsw_hdmi), HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI", patch_i915_hsw_hdmi), HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI", patch_i915_hsw_hdmi), HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI", patch_i915_hsw_hdmi), -HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI", patch_generic_hdmi), +HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI", patch_i915_cpt_hdmi), HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi), HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI", patch_i915_byt_hdmi), -HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI", patch_generic_hdmi), +HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI", patch_i915_cpt_hdmi), /* special ID for generic HDMI */ HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi), {} /* terminator */ -- 2.7.4
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