On 18/08/2022 15:15, Amadeusz Sławiński wrote:
We can use existing macros to poll and update register values instead of open coding the functionality.
Reviewed-by: Cezary Rojewski cezary.rojewski@intel.com Signed-off-by: Amadeusz Sławiński amadeuszx.slawinski@linux.intel.com
sound/hda/hdac_stream.c | 26 ++++++-------------------- 1 file changed, 6 insertions(+), 20 deletions(-)
diff --git a/sound/hda/hdac_stream.c b/sound/hda/hdac_stream.c index f3582012d22f..bdf6d4db6769 100644 --- a/sound/hda/hdac_stream.c +++ b/sound/hda/hdac_stream.c @@ -165,7 +165,6 @@ EXPORT_SYMBOL_GPL(snd_hdac_stop_streams_and_chip); void snd_hdac_stream_reset(struct hdac_stream *azx_dev) { unsigned char val;
int timeout; int dma_run_state;
snd_hdac_stream_clear(azx_dev);
@@ -173,30 +172,17 @@ void snd_hdac_stream_reset(struct hdac_stream *azx_dev) dma_run_state = snd_hdac_stream_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START;
snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_STREAM_RESET);
- udelay(3);
- timeout = 300;
- do {
val = snd_hdac_stream_readb(azx_dev, SD_CTL) &SD_CTL_STREAM_RESET;if (val)break;- } while (--timeout);
/* wait for hardware to report that the stream entered reset */
snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, (val & SD_CTL_STREAM_RESET), 3, 300);
if (azx_dev->bus->dma_stop_delay && dma_run_state) udelay(azx_dev->bus->dma_stop_delay);
- val &= ~SD_CTL_STREAM_RESET;
- snd_hdac_stream_writeb(azx_dev, SD_CTL, val);
- udelay(3);
- snd_hdac_stream_updateb(azx_dev, SD_CTL, SD_CTL_STREAM_RESET, 0);
- timeout = 300;
- /* waiting for hardware to report that the stream is out of reset */
- do {
val = snd_hdac_stream_readb(azx_dev, SD_CTL) &SD_CTL_STREAM_RESET;if (!val)break;- } while (--timeout);
/* wait for hardware to report that the stream is out of reset */
snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, !(val & SD_CTL_STREAM_RESET), 3, 300);
/* reset first position - may not be synced with hw at this time */ if (azx_dev->posbuf)
HDA playback is failing on -next for various Tegra boards. Bisect is point to this commit and reverting it fixes the problem. I was a bit puzzled why this change is causing a problem, but looking closer there is a difference between the previous code that was calling snd_hdac_stream_readb() and the new code that is calling snd_hdac_stream_readb_poll(). The function snd_hdac_stream_readb() calls snd_hdac_aligned_mmio() is see if the device has an aligned MMIO which Tegra does and then would call snd_hdac_aligned_read(). However, now the code always call readb() and this is breaking Tegra.
So it is either necessary to update snd_hdac_stream_readb_poll() to handle this or revert this change.
Cheers Jon