From: Jeeja KP jeeja.kp@intel.com
This ensures that the link is not requesting any clock and the PLL can turn off. The link is powered when controller is brought out of reset.
Signed-off-by: Jeeja KP jeeja.kp@intel.com Signed-off-by: Vinod Koul vinod.koul@intel.com --- sound/soc/intel/skylake/skl.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/sound/soc/intel/skylake/skl.c b/sound/soc/intel/skylake/skl.c index ca135b8ab5c0..5319529aedf7 100644 --- a/sound/soc/intel/skylake/skl.c +++ b/sound/soc/intel/skylake/skl.c @@ -173,6 +173,9 @@ static int skl_runtime_suspend(struct device *dev)
/* enable controller wake up event */ snd_hdac_chip_updatew(bus, WAKEEN, 0, STATESTS_INT_MASK); + + snd_hdac_ext_bus_link_power_down_all(ebus); + ret = skl_suspend_dsp(skl); if (ret < 0) return ret;