On Tue, Feb 07, 2023 at 09:45:46AM +1300, Daniel Beer wrote:
We did discuss this a while back when the driver first went in. Unfortunately the vendor software tools provide configuration for the part in the form of a sequence of raw register writes, including explicit page changes:
https://lore.kernel.org/lkml/Yd85bjKEX9JnoOlI@sirena.org.uk/
That seems surmountable, either bypassing regmap or parsing the configuration files.
Aside from this, I have two other practical issues.
The first is that I'm not sure how exactly to implement the paging scheme in terms of regmap_range_cfg (assuming this is what you're referring to). This chip has multi-level paging (books/pages), with the book selection register itself requiring paging to access. A sequence of
That's absolutely fine, this isn't the first device which has such a setup and the code handles nested windows fine.
Secondly, the patches as submitted here have been tested, but I don't currently have access to hardware. I'm very hesitant to make a significant change without retesting and leave the driver in a broken state again.
Presumably someone does given that the problem was noticed?