Hi Ricard,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on broonie-sound/for-next] [also build test WARNING on v5.16-rc1 next-20211115] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Ricard-Wanderlof/Codec-driver-for-T... base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next config: nios2-randconfig-m031-20211115 (attached as .config) compiler: nios2-linux-gcc (GCC) 11.2.0
If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot lkp@intel.com
smatch warnings: sound/soc/codecs/tlv320adc3xxx.c:1002 adc3xxx_i2c_probe() warn: unsigned 'adc3xxx->rst_pin' is never less than zero.
vim +1002 sound/soc/codecs/tlv320adc3xxx.c
956 957 static int adc3xxx_i2c_probe(struct i2c_client *i2c, 958 const struct i2c_device_id *id) 959 { 960 struct device *dev = &i2c->dev; 961 struct device_node *np = dev->of_node; 962 struct adc3xxx *adc3xxx = NULL; 963 enum of_gpio_flags flags; 964 int ret; 965 966 adc3xxx = devm_kzalloc(dev, sizeof(struct adc3xxx), GFP_KERNEL); 967 if (!adc3xxx) 968 return -ENOMEM; 969 adc3xxx->dev = dev; 970 971 adc3xxx->mclk = devm_clk_get(dev, NULL); 972 if (IS_ERR(adc3xxx->mclk)) { 973 /* 974 * The chip itself supports running off the BCLK either 975 * directly or via the PLL, but the driver does not (yet), so 976 * having a specified mclk is required. Otherwise, we could 977 * use the lack of a clocks property to indicate when BCLK is 978 * intended as the clock source. 979 */ 980 return PTR_ERR(adc3xxx->mclk); 981 } else if (adc3xxx->mclk) { 982 ret = clk_prepare_enable(adc3xxx->mclk); 983 if (ret < 0) 984 return ret; 985 dev_dbg(dev, "Enabled MCLK, freq %lu Hz\n", clk_get_rate(adc3xxx->mclk)); 986 } 987 988 adc3xxx_parse_dt_gpio(adc3xxx, "ti,dmdin-gpio1", &adc3xxx->gpio_cfg[0]); 989 adc3xxx_parse_dt_gpio(adc3xxx, "ti,dmclk-gpio2", &adc3xxx->gpio_cfg[1]); 990 adc3xxx_parse_dt_micbias(adc3xxx, "ti,micbias1-vg", &adc3xxx->micbias_vg[0]); 991 adc3xxx_parse_dt_micbias(adc3xxx, "ti,micbias2-vg", &adc3xxx->micbias_vg[1]); 992 993 adc3xxx->regmap = devm_regmap_init_i2c(i2c, &adc3xxx_regmap); 994 if (IS_ERR(adc3xxx->regmap)) { 995 ret = PTR_ERR(adc3xxx->regmap); 996 return ret; 997 } 998 999 i2c_set_clientdata(i2c, adc3xxx); 1000 1001 adc3xxx->rst_pin = of_get_named_gpio_flags(np, "reset-gpios", 0, &flags);
1002 if (adc3xxx->rst_pin < 0 || !gpio_is_valid(adc3xxx->rst_pin))
1003 return -ENXIO; 1004 1005 adc3xxx->rst_active = !(flags & OF_GPIO_ACTIVE_LOW); 1006 adc3xxx->type = id->driver_data; 1007 1008 ret = devm_gpio_request(dev, adc3xxx->rst_pin, "adc3xxx reset"); 1009 if (ret < 0) { 1010 dev_err(dev, "Failed to request rst_pin: %d\n", ret); 1011 return ret; 1012 } 1013 1014 /* Reset codec chip */ 1015 gpio_direction_output(adc3xxx->rst_pin, adc3xxx->rst_active); 1016 usleep_range(2000, 100000); /* Requirement: > 10 ns (datasheet p13) */ 1017 gpio_direction_output(adc3xxx->rst_pin, !adc3xxx->rst_active); 1018 1019 /* Potentially set up pins used as GPIOs */ 1020 adc3xxx_init_gpio(adc3xxx); 1021 1022 ret = snd_soc_register_component(dev, 1023 &soc_component_dev_adc3xxx, &adc3xxx_dai, 1); 1024 if (ret < 0) 1025 dev_err(dev, "Failed to register codec: %d\n", ret); 1026 1027 return ret; 1028 } 1029
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