6 Feb
2020
6 Feb
'20
11:47 a.m.
On Thu, 06 Feb 2020 11:10:53 +0100, Viswanath L wrote:
From: Mohan Kumar mkumard@nvidia.com
RIRB interrupt status getting cleared after the write pointer is read causes a race condition, where last response(s) into RIRB may remain unserviced by IRQ, eventually causing azx_rirb_get_response to fall back to polling mode. Clearing the RIRB interrupt status ahead of write pointer access ensures that this condition is avoided.
Signed-off-by: Mohan Kumar mkumard@nvidia.com Signed-off-by: Viswanath L viswanathl@nvidia.com
Applied, thanks.
Takashi