There is no need to sync first two registers from cache to hw after a reset. First one is used to select page for register access and this driver is normally accessing page 0 only. Second one does a software reset which is obviously unneeded after hardware or previous software reset command.
Signed-off-by: Jarkko Nikula jhnikula@gmail.com --- sound/soc/codecs/tlv320aic3x.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c index c3d96fc..9047bb1 100644 --- a/sound/soc/codecs/tlv320aic3x.c +++ b/sound/soc/codecs/tlv320aic3x.c @@ -1114,7 +1114,7 @@ static int aic3x_set_power(struct snd_soc_codec *codec, int power)
/* Sync reg_cache with the hardware */ codec->cache_only = 0; - for (i = 0; i < ARRAY_SIZE(aic3x_reg); i++) + for (i = AIC3X_SAMPLE_RATE_SEL_REG; i < ARRAY_SIZE(aic3x_reg); i++) snd_soc_write(codec, i, cache[i]); if (aic3x->model == AIC3X_MODEL_3007) aic3x_init_3007(codec);