At Tue, 3 Nov 2009 12:22:37 -0700, Troy Kisky wrote:
Poulsbo(US15W) cannot have any corb registers initialized when using single_cmd mode. When send_cmd timeout occur, note error.
Could you be more specific? What errors do you get?
And, how it goes to single_cmd mode? The single_cmd mode is very last resort, and reaching there means already a serious problem.
thanks,
Takashi
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
sound/pci/hda/hda_intel.c | 16 +++++++++++----- 1 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index c9ad182..c2ff585 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -524,6 +524,16 @@ static void azx_init_cmd_io(struct azx *chip) /* CORB set up */ chip->corb.addr = chip->rb.addr; chip->corb.buf = (u32 *)chip->rb.area;
- /* RIRB set up */
- chip->rirb.addr = chip->rb.addr + 2048;
- chip->rirb.buf = (u32 *)(chip->rb.area + 2048);
- chip->rirb.wp = chip->rirb.rp = 0;
- memset(chip->rirb.cmds, 0, sizeof(chip->rirb.cmds));
- if (chip->single_cmd) {
spin_unlock_irq(&chip->reg_lock);return;- } azx_writel(chip, CORBLBASE, (u32)chip->corb.addr); azx_writel(chip, CORBUBASE, upper_32_bits(chip->corb.addr));
@@ -536,11 +546,6 @@ static void azx_init_cmd_io(struct azx *chip) /* enable corb dma */ azx_writeb(chip, CORBCTL, ICH6_CORBCTL_RUN);
- /* RIRB set up */
- chip->rirb.addr = chip->rb.addr + 2048;
- chip->rirb.buf = (u32 *)(chip->rb.area + 2048);
- chip->rirb.wp = chip->rirb.rp = 0;
- memset(chip->rirb.cmds, 0, sizeof(chip->rirb.cmds)); azx_writel(chip, RIRBLBASE, (u32)chip->rirb.addr); azx_writel(chip, RIRBUBASE, upper_32_bits(chip->rirb.addr));
@@ -783,6 +788,7 @@ static int azx_single_send_cmd(struct hda_bus *bus, u32 val) if (printk_ratelimit()) snd_printd(SFX "send_cmd timeout: IRS=0x%x, val=0x%x\n", azx_readw(chip, IRS), val);
- chip->rirb.res[addr] = -1; return -EIO;
}
-- 1.5.6.3
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