On Fri, Sep 03, 2021 at 05:53:40PM +0300, Daniel Baluta wrote:
From: Daniel Baluta daniel.baluta@nxp.com
DSP node on the Linux kernel side must also take care of enabling DAI/DMA related clocks.
By design we choose to manage DAI/DMA clocks from the kernel side because of the architecture of some i.MX8 boards.
Clocks are handled by a special M4 core which runs a special firmware called SCFW (System Controler firmware).
This communicates with A cores running Linux via a special Messaging Unit and implements a custom API which is already implemented by the Linux kernel i.MX clocks implementation.
Note that these clocks are optional. We can use the DSP without them.
Signed-off-by: Daniel Baluta daniel.baluta@nxp.com
.../devicetree/bindings/dsp/fsl,dsp.yaml | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+)
diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml index 7afc9f2be13a..1453668c0194 100644 --- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml +++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml @@ -24,16 +24,49 @@ properties: maxItems: 1
clocks:
- minItems: 3 items:
- description: ipg clock
- description: ocram clock
- description: core clock
- description: esai0 core clock for accessing registers- description: esai0 baud clock- description: esai0 system clock- description: esai0 spba clock required when ESAI is placed in slave mode- description: SAI1 bus clock- description: SAI1 master clock 0- description: SAI1 master clock 1- description: SAI1 master clock 2- description: SAI1 master clock 3- description: SAI3 bus clock- description: SAI3 master clock 0- description: SAI3 master clock 1- description: SAI3 master clock 2- description: SAI3 master clock 3- description: SDMA3 root clock used for accessing registers
Sigh, I just rejected this kind of thing for the other i.MX8 DSP binding[1].
Add a reference to the h/w block and then get the clocks (and other resources) from there.
Rob
[1] https://lore.kernel.org/linux-devicetree/YTDq%2FkWFPLHUnHMN@robh.at.kernel.o...