The Tegra20 AC97 driver is using the legacy GPIO APIs in <linux/of_gpio.h> and <linux/gpio.h> to obtain GPIOs for reset and sync.
Convert it over and fix the polarity error on the RESET line in the process: this reset line is clearly active low. Just fix the one in-tree device tree site using it at the same time.
Signed-off-by: Linus Walleij linus.walleij@linaro.org --- If people demand that the DTS oneliner be submitted and merged separately then I can do so. (I personally think that is too much focus on process over content.) --- arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi | 2 +- sound/soc/tegra/tegra20_ac97.c | 55 +++++++++++++-------------- sound/soc/tegra/tegra20_ac97.h | 4 +- 3 files changed, 29 insertions(+), 32 deletions(-)
diff --git a/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi b/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi index 16b374e6482f..8c1d5c9fa483 100644 --- a/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi @@ -446,7 +446,7 @@ lvp0 { tegra_ac97: ac97@70002000 { status = "okay"; nvidia,codec-reset-gpio = - <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_HIGH>; + <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>; nvidia,codec-sync-gpio = <&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>; }; diff --git a/sound/soc/tegra/tegra20_ac97.c b/sound/soc/tegra/tegra20_ac97.c index e713feca25fa..8011afe93c96 100644 --- a/sound/soc/tegra/tegra20_ac97.c +++ b/sound/soc/tegra/tegra20_ac97.c @@ -12,12 +12,11 @@ #include <linux/clk.h> #include <linux/delay.h> #include <linux/device.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/io.h> #include <linux/jiffies.h> #include <linux/module.h> #include <linux/of.h> -#include <linux/of_gpio.h> #include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/reset.h> @@ -39,11 +38,15 @@ static void tegra20_ac97_codec_reset(struct snd_ac97 *ac97) u32 readback; unsigned long timeout;
- /* reset line is not driven by DAC pad group, have to toggle GPIO */ - gpio_set_value(workdata->reset_gpio, 0); + /* + * The reset line is not driven by DAC pad group, have to toggle GPIO. + * The RESET line is active low but this is abstracted by the GPIO + * library. + */ + gpiod_set_value(workdata->reset_gpio, 1); udelay(2);
- gpio_set_value(workdata->reset_gpio, 1); + gpiod_set_value(workdata->reset_gpio, 0); udelay(2);
timeout = jiffies + msecs_to_jiffies(100); @@ -66,14 +69,10 @@ static void tegra20_ac97_codec_warm_reset(struct snd_ac97 *ac97) * the controller cmd is not working, have to toggle sync line * manually. */ - gpio_request(workdata->sync_gpio, "codec-sync"); - - gpio_direction_output(workdata->sync_gpio, 1); - + gpiod_direction_output(workdata->sync_gpio, 1); udelay(2); - gpio_set_value(workdata->sync_gpio, 0); + gpiod_set_value(workdata->sync_gpio, 0); udelay(2); - gpio_free(workdata->sync_gpio);
timeout = jiffies + msecs_to_jiffies(100);
@@ -342,28 +341,26 @@ static int tegra20_ac97_platform_probe(struct platform_device *pdev) goto err_clk_put; }
- ac97->reset_gpio = of_get_named_gpio(pdev->dev.of_node, - "nvidia,codec-reset-gpio", 0); - if (gpio_is_valid(ac97->reset_gpio)) { - ret = devm_gpio_request_one(&pdev->dev, ac97->reset_gpio, - GPIOF_OUT_INIT_HIGH, "codec-reset"); - if (ret) { - dev_err(&pdev->dev, "could not get codec-reset GPIO\n"); - goto err_clk_put; - } - } else { - dev_err(&pdev->dev, "no codec-reset GPIO supplied\n"); - ret = -EINVAL; + /* Obtain RESET de-asserted */ + ac97->reset_gpio = devm_gpiod_get(&pdev->dev, + "nvidia,codec-reset", + GPIOD_OUT_LOW); + if (IS_ERR(ac97->reset_gpio)) { + ret = PTR_ERR(ac97->reset_gpio); + dev_err(&pdev->dev, "no RESET GPIO supplied: %d\n", ret); goto err_clk_put; } - - ac97->sync_gpio = of_get_named_gpio(pdev->dev.of_node, - "nvidia,codec-sync-gpio", 0); - if (!gpio_is_valid(ac97->sync_gpio)) { - dev_err(&pdev->dev, "no codec-sync GPIO supplied\n"); - ret = -EINVAL; + gpiod_set_consumer_name(ac97->reset_gpio, "codec-reset"); + + ac97->sync_gpio = devm_gpiod_get(&pdev->dev, + "nvidia,codec-sync", + GPIOD_OUT_LOW); + if (IS_ERR(ac97->sync_gpio)) { + ret = PTR_ERR(ac97->sync_gpio); + dev_err(&pdev->dev, "no codec-sync GPIO supplied: %d\n", ret); goto err_clk_put; } + gpiod_set_consumer_name(ac97->sync_gpio, "codec-sync");
ac97->capture_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_RX1; ac97->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; diff --git a/sound/soc/tegra/tegra20_ac97.h b/sound/soc/tegra/tegra20_ac97.h index 870ea09ff301..116d7b2db27e 100644 --- a/sound/soc/tegra/tegra20_ac97.h +++ b/sound/soc/tegra/tegra20_ac97.h @@ -80,7 +80,7 @@ struct tegra20_ac97 { struct snd_dmaengine_dai_dma_data playback_dma_data; struct reset_control *reset; struct regmap *regmap; - int reset_gpio; - int sync_gpio; + struct gpio_desc *reset_gpio; + struct gpio_desc *sync_gpio; }; #endif /* __TEGRA20_AC97_H__ */