3 Oct
2014
3 Oct
'14
5:08 p.m.
On Fri, Oct 03, 2014 at 04:18:56PM +0300, Dmitry Lavnikevich wrote:
Current caching implementation during regcache_sync() call bypasses all register writes of values that are already known as default (regmap reg_defaults). Same time in TLV320AIC3x codecs register 5
Applied, thanks. This should really have been sent separately to the other patches - it's not in any way specific to the board and there's no dependency in either direction.