On 24/05/2021 22:02, Dmitry Osipenko wrote:
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The 128*srate gives MCLK >6MHZ for 64/88/96, 256*srate gives MCLK >6MHZ for rates below 64kHZ. Looks like the goal is to get MCLK >6MHZ.
The wm8903 supports 8kHz sample rates and 256*8000 is less than 6MHz. Yes the FIXME loop corrects this, but you could also extend the case statement to multiply by 512 for 8kHz.
But what benefits this extension will bring to us if the end result is the same?
For the wm8903, nothing, but that is not the concern really.
The WM8903 datasheet says:
"The following operating frequency limits must be observed when configuring CLK_SYS. Failure to observe these limits will result in degraded noise performance and/or incorrect ADC/DAC functionality.
If DAC_OSR = 0 then CLK_SYS 3MHz If DAC_OSR = 1 then CLK_SYS 6MHz"
Where DAC_OSR is DAC Oversampling Control 0 = Low power (normal oversample) 1 = High performance (double rate)
I see that DAC_OSR=0 by default, it can be switched to 1 by userspace ALSA control.
Yes that is all fine, but again this is specific to the wm8903.
Alright, I'll move it to the WM8903 driver in v4. It won't be a problem to make that function shared once will be actually needed.
Thanks, but it should only be shared if other codecs actually have this same requirement. From what you have said about the rt5631 it is not clear that it actually is the same or not.
Jon