The ops to read and write registers should take pointers labeled as __iomem. Thanks to the sparse bot for catching this.
Signed-off-by: Dylan Reid dgreid@chromium.org --- sound/pci/hda/hda_intel.c | 12 ++++++------ sound/pci/hda/hda_priv.h | 12 ++++++------ 2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 149c00b..77ca894 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -1431,32 +1431,32 @@ static void azx_firmware_cb(const struct firmware *fw, void *context) */
/* PCI register access. */ -static void pci_azx_writel(u32 value, u32 *addr) +static void pci_azx_writel(u32 value, u32 __iomem *addr) { writel(value, addr); }
-static u32 pci_azx_readl(u32 *addr) +static u32 pci_azx_readl(u32 __iomem *addr) { return readl(addr); }
-static void pci_azx_writew(u16 value, u16 *addr) +static void pci_azx_writew(u16 value, u16 __iomem *addr) { writew(value, addr); }
-static u16 pci_azx_readw(u16 *addr) +static u16 pci_azx_readw(u16 __iomem *addr) { return readw(addr); }
-static void pci_azx_writeb(u8 value, u8 *addr) +static void pci_azx_writeb(u8 value, u8 __iomem *addr) { writeb(value, addr); }
-static u8 pci_azx_readb(u8 *addr) +static u8 pci_azx_readb(u8 __iomem *addr) { return readb(addr); } diff --git a/sound/pci/hda/hda_priv.h b/sound/pci/hda/hda_priv.h index 198fa82..ba38b81 100644 --- a/sound/pci/hda/hda_priv.h +++ b/sound/pci/hda/hda_priv.h @@ -290,12 +290,12 @@ struct azx; /* Functions to read/write to hda registers. */ struct hda_controller_ops { /* Register Access */ - void (*reg_writel)(u32 value, u32 *addr); - u32 (*reg_readl)(u32 *addr); - void (*reg_writew)(u16 value, u16 *addr); - u16 (*reg_readw)(u16 *addr); - void (*reg_writeb)(u8 value, u8 *addr); - u8 (*reg_readb)(u8 *addr); + void (*reg_writel)(u32 value, u32 __iomem *addr); + u32 (*reg_readl)(u32 __iomem *addr); + void (*reg_writew)(u16 value, u16 __iomem *addr); + u16 (*reg_readw)(u16 __iomem *addr); + void (*reg_writeb)(u8 value, u8 __iomem *addr); + u8 (*reg_readb)(u8 __iomem *addr); /* Disable msi if supported, PCI only */ int (*disable_msi_reset_irq)(struct azx *); /* Allocation ops */