On 03/26/2009 02:45 PM, Mark Brown wrote:
On Thu, Mar 26, 2009 at 02:21:46PM +0100, Daniel Gl??ckner wrote:
The aforementioned rule implies that we can not disable the PLL in stand-by bias level.
Could you go into more detail on why you believe that this is the case? The DACs and ADCs won't be operational when the bias is held at standby which means that at most standby needs to wait for them to go idle.
This is based on the fact that soc_pcm_prepare calls snd_soc_dapm_stream_event(..., SND_SOC_DAPM_STREAM_START) before snd_soc_dapm_set_bias_level(..., SND_SOC_BIAS_ON).
In addition there is a block of code in tlv320aic3x.c that explicitly disables the ADC/DAC in SND_SOC_BIAS_OFF. It may be superfluous, though.
+static u8 aic3x_power_codec(struct snd_soc_codec *codec, u8 new) +{
This really needs some comments explaining what it's doing; it's not really clear what effect it's trying to achieve or how it interacts with DAPM.
This function takes a bitmask of the desired power state of the ADC/DAC blocks and configures the device accordingly. It returns a bitmask of the previous power state, suitable for input.
Daniel